Bin Meng 51050ff0a2 x86: irq: Support discrete PIRQ routing registers via device tree ... Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume consecutive PIRQ routing control registers. But this is not always the case on some platforms. Introduce a new device tree property intel,pirq-regmap to describe how the PIRQ routing register offset is mapped to the link number and adjust the irq router driver to utilize the mapping. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>		2018-06-13 09:50:57 +08:00
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altera_sysid.txt	nios2: convert altera sysid to driver model	2015-10-23 07:37:03 +08:00
cros-ec.txt	cros: add cros_ec driver	2013-06-26 10:07:11 -04:00
intel,baytrail-fsp.txt	x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer	2017-06-05 08:55:22 +08:00
intel,irq-router.txt	x86: irq: Support discrete PIRQ routing registers via device tree	2018-06-13 09:50:57 +08:00
intel-lpc.txt	x86: ivybridge: Add additional LPC init	2014-11-25 06:34:01 -07:00