u-boot/board/emulation
Anup Patel fdff1f96a6 riscv: Rename cpu/qemu to cpu/generic
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.

This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-27 09:12:33 +08:00
..
qemu-arm arm: qemu: Enumerate virtio bus during early boot 2018-11-14 09:16:28 -08:00
qemu-riscv riscv: Rename cpu/qemu to cpu/generic 2019-02-27 09:12:33 +08:00
qemu-x86 x86: qemu: Imply virtio PCI transport and device drivers 2018-11-14 09:16:28 -08:00
Kconfig SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00