mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 11:18:28 +00:00
aea02abec5
This patch adds support for Altera StratixV bitstream programming. 2 FPGAs are connected to the SPI busses. This patch uses board specific write code to program the bitstream via SPI direct write mode. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
27 lines
683 B
Text
27 lines
683 B
Text
CONFIG_ARM=y
|
|
CONFIG_ARCH_MVEBU=y
|
|
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
|
CONFIG_TARGET_THEADORABLE=y
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
|
|
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
|
CONFIG_SPL=y
|
|
CONFIG_FIT=y
|
|
# CONFIG_CMD_IMLS is not set
|
|
# CONFIG_CMD_FLASH is not set
|
|
CONFIG_CMD_SF=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
# CONFIG_CMD_NET is not set
|
|
# CONFIG_CMD_NFS is not set
|
|
CONFIG_SPL_OF_TRANSLATE=y
|
|
CONFIG_SPI_FLASH=y
|
|
CONFIG_SPI_FLASH_MACRONIX=y
|
|
CONFIG_SPI_FLASH_STMICRO=y
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_DEBUG_UART_BASE=0xd0012000
|
|
CONFIG_DEBUG_UART_CLOCK=250000000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550=y
|
|
CONFIG_VIDEO_MVEBU=y
|
|
CONFIG_REGEX=y
|
|
CONFIG_LIB_RAND=y
|