mirror of
https://github.com/AsahiLinux/u-boot
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246 lines
7.6 KiB
C
246 lines
7.6 KiB
C
/*
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* (C) Copyright 2010
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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/*
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* This file contains Marvell Board Specific common defincations.
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* This file should be included in board config header file.
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*
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* It supports common definations for Kirkwood platform
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* TBD: support for Orion5X platforms
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*/
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#ifndef _MV_COMMON_H
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#define _MV_COMMON_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_MARVELL 1
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#define CONFIG_ARM926EJS 1 /* Basic Architecture */
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#if defined(CONFIG_KIRKWOOD)
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#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
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#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
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#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
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#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
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/*
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* By default kwbimage.cfg from board specific folder is used
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* If for some board, different configuration file need to be used,
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* CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
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*/
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#ifndef CONFIG_SYS_KWD_CONFIG
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#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
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#endif /* CONFIG_SYS_KWD_CONFIG */
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/*
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* CONFIG_SYS_TEXT_BASE can be defined in board specific header file, if needed
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*/
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0x00600000
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#endif /* CONFIG_SYS_TEXT_BASE */
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#define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE
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#define MV_UART0_BASE KW_UART0_BASE
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#define MV_SATA_BASE KW_SATA_BASE
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#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET
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#define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET
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#else
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#error "Unsupported SoC"
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#endif
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/* additions for new ARM relocation support */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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/* Kirkwood has 2k of Security SRAM, use it for SP */
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#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
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/*
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* CLKs configurations
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*/
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#define CONFIG_SYS_HZ 1000
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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#define CONFIG_SYS_NS16550_COM1 MV_UART0_BASE
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/*
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* Serial Port configuration
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* The following definitions let you select what serial you want to use
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* for your console driver.
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*/
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#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
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115200,230400, 460800, 921600 }
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/* auto boot */
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#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
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#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
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#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
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/*
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* NAND configuration
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*/
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_KIRKWOOD
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS 1
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#define CONFIG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */
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#define NAND_ALLOW_ERASE_ALL 1
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#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
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#endif
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/*
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* SPI Flash configuration
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*/
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH 1
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#define CONFIG_HARD_SPI 1
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#define CONFIG_KIRKWOOD_SPI 1
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#define CONFIG_SPI_FLASH_MACRONIX 1
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */
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#endif
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1MiB for malloc() */
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/* size in bytes reserved for initial data */
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/*
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* Other required minimal configurations
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
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#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
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#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */
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#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
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#define CONFIG_NR_DRAM_BANKS 4
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#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
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#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
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#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
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#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
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#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/*
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* Ethernet Driver configuration
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_CMD_MII
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#define CONFIG_NETCONSOLE /* include NetConsole support */
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#define CONFIG_NET_MULTI /* specify more that one ports available */
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#define CONFIG_MII /* expose smi ove miiphy interface */
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#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
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#endif /* CONFIG_CMD_NET */
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/*
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* USB/EHCI
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI /* Enable EHCI USB support */
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#define CONFIG_USB_EHCI_KIRKWOOD
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_ISO_PARTITION
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#define CONFIG_SUPPORT_VFAT
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#endif /* CONFIG_CMD_USB */
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/*
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* IDE Support on SATA ports
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*/
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#ifdef CONFIG_CMD_IDE
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#define __io
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#define CONFIG_CMD_EXT2
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#define CONFIG_MVSATA_IDE
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#define CONFIG_IDE_PREINIT
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#define CONFIG_MVSATA_IDE_USE_PORT1
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/* Needs byte-swapping for ATA data register */
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#define CONFIG_IDE_SWAP_IO
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/* Data, registers and alternate blocks are at the same offset */
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#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
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#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
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#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
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/* Each 8-bit ATA register is aligned to a 4-bytes address */
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#define CONFIG_SYS_ATA_STRIDE 4
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/* Controller supports 48-bits LBA addressing */
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#define CONFIG_LBA48
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/* CONFIG_CMD_IDE requires some #defines for ATA registers */
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#define CONFIG_SYS_IDE_MAXBUS 2
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#define CONFIG_SYS_IDE_MAXDEVICE 2
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/* ATA registers base is at SATA controller base */
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#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE
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#endif /* CONFIG_CMD_IDE */
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/*
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* I2C related stuff
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*/
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_I2C_MVTWSI
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#define CONFIG_SYS_I2C_SLAVE 0x0
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#define CONFIG_SYS_I2C_SPEED 100000
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#endif
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/*
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* File system
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*/
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_RBTREE
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_LZO
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#endif /* _MV_COMMON_H */
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