mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 13:56:30 +00:00
019df879a9
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
/*
|
|
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <mach/boot-device.h>
|
|
#include <mach/sbc-regs.h>
|
|
#include <mach/soc_info.h>
|
|
|
|
static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
|
{
|
|
printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF");
|
|
|
|
switch (uniphier_get_soc_type()) {
|
|
#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
|
|
case SOC_UNIPHIER_PH1_SLD3:
|
|
ph1_sld3_boot_mode_show();
|
|
break;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
|
|
defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \
|
|
defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
|
|
case SOC_UNIPHIER_PH1_LD4:
|
|
case SOC_UNIPHIER_PH1_PRO4:
|
|
case SOC_UNIPHIER_PH1_SLD8:
|
|
ph1_ld4_boot_mode_show();
|
|
break;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
|
|
case SOC_UNIPHIER_PH1_PRO5:
|
|
ph1_pro5_boot_mode_show();
|
|
break;
|
|
#endif
|
|
#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \
|
|
defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
|
|
case SOC_UNIPHIER_PROXSTREAM2:
|
|
case SOC_UNIPHIER_PH1_LD6B:
|
|
proxstream2_boot_mode_show();
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
pinmon, 1, 1, do_pinmon,
|
|
"pin monitor",
|
|
""
|
|
);
|