mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-15 07:43:07 +00:00
f0498b2be2
The rk3328 sdram driver read sdram parameters from the devicetree into a struct rk3328_sdram_params using dev_read_u32_array. After commit5ab30c3176("ram: rockchip: Update ddr pctl regs for px30") changed the size of struct ddr_pctl_regs, a member of struct rk3328_sdram_params, U-Boot TPL can no longer initialize DRAM on RK3328. Add ten u32 to the sdram parameter array in devicetree to align with this size change. This fixes DRAM initialization on RK3328. Fixes:5ab30c3176("ram: rockchip: Update ddr pctl regs for px30") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3328-cc
229 lines
2 KiB
Text
229 lines
2 KiB
Text
/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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&dmc {
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rockchip,sdram-params = <
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0x1
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0xC
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0x3
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0x1
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0x0
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0x0
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0x10
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0x10
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0x10
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0x10
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0
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0x8c48a18a
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0x00000000
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0x00000021
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0x00000482
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0x00000015
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0x0000021a
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0x000000ff
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333
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6
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1
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0
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0
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0x00000000
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0x43041008
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0x00000064
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0x00140023
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0x000000d0
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0x00220002
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0x000000d4
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0x00010000
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0x000000d8
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0x00000703
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0x000000dc
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0x00830004
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0x000000e0
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0x00010000
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0x000000e4
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0x00070003
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0x000000f4
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0x000f011f
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0x00000100
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0x06090b07
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0x00000104
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0x0002020b
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0x00000108
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0x02030506
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0x0000010c
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0x00505000
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0x00000110
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0x03020204
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0x00000114
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0x01010303
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0x00000118
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0x02020003
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0x00000120
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0x00000303
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0x00000138
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0x00000025
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0x00000180
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0x003c000f
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0x00000184
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0x00900000
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0x00000190
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0x07020000
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0x00000198
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0x05001100
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0x000001a0
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0xc0400003
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0x00000240
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0x0900090c
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0x00000244
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0x00000101
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0x00000250
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0x00000f00
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0x00000490
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0x00000001
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0xffffffff
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0x00000004
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0x0000000b
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0x00000028
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0x00000006
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0x0000002c
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0x00000000
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0x00000030
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0x00000003
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0xffffffff
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0xffffffff
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0x77
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0x88
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0x79
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0x79
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0x87
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0x97
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0x87
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0x78
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0x77
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0x78
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0x87
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0x88
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0x87
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0x87
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0x77
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x69
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0x9
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0x77
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0x78
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0x77
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0x78
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0x77
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0x78
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0x77
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0x78
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0x77
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0x79
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0x9
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x69
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0x9
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0x77
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0x78
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0x77
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0x77
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0x77
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0x77
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0x77
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0x77
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0x77
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0x79
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0x9
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x69
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0x9
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0x77
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0x78
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0x77
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0x78
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0x77
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0x78
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0x77
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0x78
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0x77
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0x79
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0x9
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x78
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0x69
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0x9
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0x77
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0x78
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0x77
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0x77
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0x77
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0x77
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0x77
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0x77
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0x77
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0x79
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0x9
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>;
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};
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