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d8e0ca851b
IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de>
151 lines
3 KiB
C
151 lines
3 KiB
C
/*
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* Copyright (C) 2009
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* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
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*
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* Copyright (C) 2011
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* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <errno.h>
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enum mxc_gpio_direction {
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MXC_GPIO_DIRECTION_IN,
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MXC_GPIO_DIRECTION_OUT,
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};
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/* GPIO port description */
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static unsigned long gpio_ports[] = {
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[0] = GPIO1_BASE_ADDR,
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[1] = GPIO2_BASE_ADDR,
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[2] = GPIO3_BASE_ADDR,
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#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
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[3] = GPIO4_BASE_ADDR,
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#endif
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#if defined(CONFIG_MX53)
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[4] = GPIO5_BASE_ADDR,
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[5] = GPIO6_BASE_ADDR,
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[6] = GPIO7_BASE_ADDR,
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#endif
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};
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static int mxc_gpio_direction(unsigned int gpio,
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enum mxc_gpio_direction direction)
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{
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unsigned int port = gpio >> 5;
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struct gpio_regs *regs;
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u32 l;
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if (port >= ARRAY_SIZE(gpio_ports))
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return -EINVAL;
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gpio &= 0x1f;
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regs = (struct gpio_regs *)gpio_ports[port];
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l = readl(®s->gpio_dir);
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switch (direction) {
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case MXC_GPIO_DIRECTION_OUT:
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l |= 1 << gpio;
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break;
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case MXC_GPIO_DIRECTION_IN:
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l &= ~(1 << gpio);
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}
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writel(l, ®s->gpio_dir);
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return 0;
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}
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void gpio_set_value(int gpio, int value)
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{
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unsigned int port = gpio >> 5;
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struct gpio_regs *regs;
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u32 l;
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if (port >= ARRAY_SIZE(gpio_ports))
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return;
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gpio &= 0x1f;
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regs = (struct gpio_regs *)gpio_ports[port];
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l = readl(®s->gpio_dr);
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if (value)
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l |= 1 << gpio;
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else
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l &= ~(1 << gpio);
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writel(l, ®s->gpio_dr);
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}
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int gpio_get_value(int gpio)
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{
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unsigned int port = gpio >> 5;
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struct gpio_regs *regs;
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u32 l;
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if (port >= ARRAY_SIZE(gpio_ports))
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return -EINVAL;
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gpio &= 0x1f;
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regs = (struct gpio_regs *)gpio_ports[port];
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l = (readl(®s->gpio_dr) >> gpio) & 0x01;
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return l;
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}
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int gpio_request(int gp, const char *label)
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{
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unsigned int port = gp >> 5;
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if (port >= ARRAY_SIZE(gpio_ports))
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return -EINVAL;
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return 0;
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}
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void gpio_free(int gp)
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{
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}
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void gpio_toggle_value(int gp)
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{
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gpio_set_value(gp, !gpio_get_value(gp));
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}
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int gpio_direction_input(int gp)
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{
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return mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_IN);
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}
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int gpio_direction_output(int gp, int value)
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{
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int ret = mxc_gpio_direction(gp, MXC_GPIO_DIRECTION_OUT);
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if (ret < 0)
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return ret;
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gpio_set_value(gp, value);
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return 0;
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}
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