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323846561a
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/*
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* (C) Copyright 2009
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_CLOCK_H
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#define __ASM_ARCH_CLOCK_H
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#include <common.h>
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#ifdef CONFIG_SYS_MX5_HCLK
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#define MXC_HCLK CONFIG_SYS_MX5_HCLK
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#else
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#define MXC_HCLK 24000000
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#endif
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#ifdef CONFIG_SYS_MX5_CLK32
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#define MXC_CLK32 CONFIG_SYS_MX5_CLK32
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#else
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#define MXC_CLK32 32768
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#endif
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_AHB_CLK,
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MXC_IPG_CLK,
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MXC_IPG_PERCLK,
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MXC_UART_CLK,
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MXC_CSPI_CLK,
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MXC_ESDHC_CLK,
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MXC_ESDHC2_CLK,
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MXC_ESDHC3_CLK,
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MXC_ESDHC4_CLK,
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MXC_FEC_CLK,
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MXC_SATA_CLK,
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MXC_DDR_CLK,
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MXC_NFC_CLK,
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MXC_PERIPH_CLK,
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MXC_I2C_CLK,
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};
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u32 imx_get_uartclk(void);
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u32 imx_get_fecclk(void);
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unsigned int mxc_get_clock(enum mxc_clock clk);
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int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
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void set_usb_phy_clk(void);
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void enable_usb_phy1_clk(unsigned char enable);
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void enable_usb_phy2_clk(unsigned char enable);
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void set_usboh3_clk(void);
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void enable_usboh3_clk(unsigned char enable);
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void mxc_set_sata_internal_clock(void);
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int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
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#endif /* __ASM_ARCH_CLOCK_H */
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