mirror of
https://github.com/AsahiLinux/u-boot
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150c24936b
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
70 lines
2.1 KiB
C
70 lines
2.1 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <tps6586x.h>
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#include <asm/io.h>
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#include <asm/arch/tegra.h>
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#include <asm/arch-tegra/ap.h>
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#include <asm/arch-tegra/tegra_i2c.h>
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#include <asm/arch-tegra/sys_proto.h>
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#define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */
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#define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */
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#define VDD_CORE_NOMINAL_T20 0x16 /* 1.275v */
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#define VDD_CPU_NOMINAL_T20 0x0f /* 1.1v */
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#define VDD_RELATION 0x02 /* 50mv */
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#define VDD_TRANSITION_STEP 0x06 /* 150mv */
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#define VDD_TRANSITION_RATE 0x06 /* 3.52mv/us */
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int pmu_set_nominal(void)
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{
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int core, cpu, bus;
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/* by default, the table has been filled with T25 settings */
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switch (tegra_get_chip_type()) {
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case TEGRA_SOC_T20:
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core = VDD_CORE_NOMINAL_T20;
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cpu = VDD_CPU_NOMINAL_T20;
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break;
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case TEGRA_SOC_T25:
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core = VDD_CORE_NOMINAL_T25;
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cpu = VDD_CPU_NOMINAL_T25;
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break;
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default:
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debug("%s: Unknown chip type\n", __func__);
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return -1;
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}
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bus = tegra_i2c_get_dvc_bus_num();
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if (bus == -1) {
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debug("%s: Cannot find DVC I2C bus\n", __func__);
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return -1;
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}
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tps6586x_init(bus);
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tps6586x_set_pwm_mode(TPS6586X_PWM_SM1);
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return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP,
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VDD_TRANSITION_RATE, VDD_RELATION);
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}
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