mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-24 12:03:39 +00:00
158 lines
3.6 KiB
Text
158 lines
3.6 KiB
Text
/* Linker script for Gaisler Research AB's Template design
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* for Altera NIOS Development board Stratix II Edition, EP2S60 FPGA.
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*
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* (C) Copyright 2008
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
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OUTPUT_ARCH(sparc)
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ENTRY(_start)
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SECTIONS
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{
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/* Read-only sections, merged into text segment: */
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. = + SIZEOF_HEADERS;
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.rel.text : { *(.rel.text) }
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.rela.text : { *(.rela.text) }
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.rel.data : { *(.rel.data) }
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.rela.data : { *(.rela.data) }
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.rel.rodata : { *(.rel.rodata) }
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.rela.rodata : { *(.rela.rodata) }
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.rel.got : { *(.rel.got) }
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.rela.got : { *(.rela.got) }
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.rel.ctors : { *(.rel.ctors) }
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.rela.ctors : { *(.rela.ctors) }
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.rel.dtors : { *(.rel.dtors) }
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.rela.dtors : { *(.rela.dtors) }
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.rel.bss : { *(.rel.bss) }
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.rela.bss : { *(.rela.bss) }
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.rel.plt : { *(.rel.plt) }
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.rela.plt : { *(.rela.plt) }
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.init : { *(.init) }
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.plt : { *(.plt) }
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.text : {
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_load_addr = .;
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_text = .;
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*(.start)
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arch/sparc/cpu/leon3/start.o (.text)
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/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
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. = ALIGN(8192);
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/* PROM CODE, Will be relocated to the end of memory,
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* no global data accesses please.
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*/
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__prom_start = .;
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*(.prom.pgt)
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*(.prom.data)
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*(.prom.text)
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. = ALIGN(16);
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__prom_end = .;
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*(.text)
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*(.fixup)
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*(.gnu.warning)
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/* *(.got1)*/
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. = ALIGN(16);
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*(.eh_frame)
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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}
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. = ALIGN(4);
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_etext = .;
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/* CMD Table */
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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. = ALIGN(4);
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__u_boot_cmd_end = .;
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.data :
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{
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*(.data)
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*(.data1)
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*(.data.rel)
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*(.data.rel.*)
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*(.sdata)
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*(.sdata2)
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*(.dynamic)
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CONSTRUCTORS
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}
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_edata = .;
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PROVIDE (edata = .);
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. = ALIGN(4);
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__got_start = .;
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.got : {
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*(.got)
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/* *(.data.rel)
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*(.data.rel.local)*/
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. = ALIGN(16);
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}
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__got_end = .;
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/* .data.rel : { } */
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. = ALIGN(4096);
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__init_begin = .;
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.text.init : { *(.text.init) }
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.data.init : { *(.data.init) }
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. = ALIGN(4096);
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__init_end = .;
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__bss_start = .;
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.bss :
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{
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*(.sbss) *(.scommon)
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*(.dynbss)
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*(.bss)
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*(COMMON)
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. = ALIGN(16); /* to speed clearing of bss up */
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}
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__bss_end = . ;
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_end = . ;
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PROVIDE (end = .);
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/* Relocated into main memory */
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/* Start of main memory */
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/*. = 0x40000000;*/
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.stack (NOLOAD) : { *(.stack) }
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/* PROM CODE */
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/* global data in RAM passed to kernel after booting */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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}
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