mirror of
https://github.com/AsahiLinux/u-boot
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5c952cf024
- Add support for Altera Nios-II processors. - Add support for Psyent PCI-5441 board. - Add support for Psyent PK1C20 board.
131 lines
3.5 KiB
C
131 lines
3.5 KiB
C
/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_NIOS2_OPCODES_H_
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#define __ASM_NIOS2_OPCODES_H_
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#define OPCODE_OP(inst) ((inst) & 0x3f)
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#define OPCODE_OPX(inst) (((inst)>>11) & 0x3f)
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#define OPCODE_RA(inst) (((inst)>>27) & 01f)
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#define OPCODE_RB(inst) (((inst)>>22) & 01f)
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#define OPCODE_RC(inst) (((inst)>>17) & 01f)
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/* I-TYPE (immediate) and J-TYPE (jump) opcodes
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*/
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#define OPCODE_CALL 0x00
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#define OPCODE_LDBU 0x03
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#define OPCODE_ADDI 0x04
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#define OPCODE_STB 0x05
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#define OPCODE_BR 0x06
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#define OPCODE_LDB 0x07
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#define OPCODE_CMPGEI 0x08
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#define OPCODE_LDHU 0x0B
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#define OPCODE_ANDI 0x0C
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#define OPCODE_STH 0x0D
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#define OPCODE_BGE 0x0E
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#define OPCODE_LDH 0x0F
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#define OPCODE_CMPLTI 0x10
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#define OPCODE_XORI 0x1C
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#define OPCODE_ORI 0x14
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#define OPCODE_STW 0x15
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#define OPCODE_BLT 0x16
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#define OPCODE_LDW 0x17
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#define OPCODE_CMPNEI 0x18
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#define OPCODE_BNE 0x1E
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#define OPCODE_CMPEQI 0x20
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#define OPCODE_LDBUIO 0x23
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#define OPCODE_MULI 0x24
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#define OPCODE_STBIO 0x25
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#define OPCODE_BEQ 0x26
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#define OPCODE_LDBIO 0x27
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#define OPCODE_CMPGEUI 0x28
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#define OPCODE_ANDHI 0x2C
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#define OPCODE_STHIO 0x2D
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#define OPCODE_BGEU 0x2E
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#define OPCODE_LDHIO 0x2F
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#define OPCODE_CMPLTUI 0x30
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#define OPCODE_CUSTOM 0x32
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#define OPCODE_INITD 0x33
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#define OPCODE_ORHI 0x34
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#define OPCODE_STWIO 0x35
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#define OPCODE_BLTU 0x36
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#define OPCODE_LDWIO 0x37
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#define OPCODE_RTYPE 0x3A
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#define OPCODE_LDHUIO 0x2B
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#define OPCODE_FLUSHD 0x3B
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#define OPCODE_XORHI 0x3C
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/* R-Type (register) OPX field encodings
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*/
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#define OPCODE_ERET 0x01
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#define OPCODE_ROLI 0x02
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#define OPCODE_ROL 0x03
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#define OPCODE_FLUSHP 0x04
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#define OPCODE_RET 0x05
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#define OPCODE_NOR 0x06
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#define OPCODE_MULXUU 0x07
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#define OPCODE_CMPGE 0x08
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#define OPCODE_BRET 0x09
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#define OPCODE_ROR 0x0B
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#define OPCODE_FLUSHI 0x0C
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#define OPCODE_JMP 0x0D
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#define OPCODE_AND 0x0E
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#define OPCODE_CMPLT 0x10
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#define OPCODE_SLLI 0x12
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#define OPCODE_SLL 0x13
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#define OPCODE_OR 0x16
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#define OPCODE_MULXSU 0x17
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#define OPCODE_CMPNE 0x18
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#define OPCODE_SRLI 0x1A
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#define OPCODE_SRL 0x1B
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#define OPCODE_NEXTPC 0x1C
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#define OPCODE_CALLR 0x1D
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#define OPCODE_XOR 0x1E
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#define OPCODE_MULXSS 0x1F
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#define OPCODE_CMPEQ 0x20
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#define OPCODE_CMPLTU 0x30
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#define OPCODE_ADD 0x31
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#define OPCODE_DIVU 0x24
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#define OPCODE_DIV 0x25
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#define OPCODE_RDCTL 0x26
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#define OPCODE_MUL 0x27
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#define OPCODE_CMPGEU 0x28
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#define OPCODE_TRAP 0x2D
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#define OPCODE_WRCTL 0x2E
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#define OPCODE_BREAK 0x34
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#define OPCODE_SYNC 0x36
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#define OPCODE_INITI 0x29
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#define OPCODE_SUB 0x39
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#define OPCODE_SRAI 0x3A
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#define OPCODE_SRA 0x3B
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/*Full instruction encodings for R-Type, without the R's ;-)
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*
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* TODO: BREAK, BRET, ERET, RET, SYNC (as needed)
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*/
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#define OPC_TRAP 0x003b683a
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#endif /* __ASM_NIOS2_OPCODES_H_ */
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