mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
5be172819f
UART base address is located in internal registers. Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000 and in proper U-Boot at address 0xf1000000. Fix DEBUG_UART_BASE option for all 32-bit mvebu boards. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
90 lines
2.1 KiB
Text
90 lines
2.1 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_ARCH_CPU_INIT=y
|
|
CONFIG_ARCH_MVEBU=y
|
|
CONFIG_SYS_TEXT_BASE=0x00800000
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_NR_DRAM_BANKS=2
|
|
CONFIG_TARGET_THEADORABLE=y
|
|
CONFIG_ENV_SIZE=0x10000
|
|
CONFIG_ENV_OFFSET=0x100000
|
|
CONFIG_ENV_SECT_SIZE=0x40000
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
|
|
CONFIG_SPL_TEXT_BASE=0x40004030
|
|
CONFIG_SPL_SERIAL=y
|
|
CONFIG_SPL=y
|
|
CONFIG_DEBUG_UART_BASE=0xf1012000
|
|
CONFIG_DEBUG_UART_CLOCK=250000000
|
|
CONFIG_SYS_MEM_TOP_HIDE=0x80000
|
|
CONFIG_SYS_LOAD_ADDR=0x800000
|
|
CONFIG_DEBUG_UART=y
|
|
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
|
CONFIG_FIT=y
|
|
CONFIG_BOOTDELAY=3
|
|
CONFIG_USE_PREBOOT=y
|
|
# CONFIG_CONSOLE_MUX is not set
|
|
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
|
# CONFIG_DISPLAY_BOARDINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_SPL_I2C=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_CMD_BOOTZ=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_PCI=y
|
|
CONFIG_CMD_SPI=y
|
|
CONFIG_CMD_USB=y
|
|
CONFIG_CMD_DHCP=y
|
|
CONFIG_CMD_TFTPPUT=y
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
CONFIG_CMD_BMP=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_CMD_EXT4=y
|
|
CONFIG_CMD_FAT=y
|
|
CONFIG_CMD_FS_GENERIC=y
|
|
CONFIG_EFI_PARTITION=y
|
|
# CONFIG_SPL_PARTITION_UUIDS is not set
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_SPI_MAX_HZ=50000000
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_ARP_TIMEOUT=200
|
|
CONFIG_NET_RETRY_COUNT=50
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
|
CONFIG_SPL_OF_TRANSLATE=y
|
|
CONFIG_SATA_MV=y
|
|
CONFIG_SYS_SATA_MAX_DEVICE=1
|
|
CONFIG_BOOTCOUNT_LIMIT=y
|
|
CONFIG_BOOTCOUNT_RAM=y
|
|
CONFIG_FPGA_ALTERA=y
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_SYS_I2C_MVTWSI=y
|
|
# CONFIG_MMC is not set
|
|
CONFIG_SF_DEFAULT_SPEED=27777777
|
|
CONFIG_SPI_FLASH_MACRONIX=y
|
|
CONFIG_SPI_FLASH_STMICRO=y
|
|
CONFIG_PHY_MARVELL=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_MVNETA=y
|
|
CONFIG_MII=y
|
|
CONFIG_MVMDIO=y
|
|
CONFIG_PCI=y
|
|
CONFIG_DM_PCI_COMPAT=y
|
|
CONFIG_PCI_MVEBU=y
|
|
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550=y
|
|
CONFIG_KIRKWOOD_SPI=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_STORAGE=y
|
|
CONFIG_DM_VIDEO=y
|
|
# CONFIG_VIDEO_BPP8 is not set
|
|
# CONFIG_VIDEO_BPP32 is not set
|
|
CONFIG_VIDEO_MVEBU=y
|
|
CONFIG_BMP_16BPP=y
|
|
CONFIG_BMP_24BPP=y
|
|
CONFIG_BMP_32BPP=y
|