mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-20 14:41:58 +00:00
5be172819f
UART base address is located in internal registers. Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000 and in proper U-Boot at address 0xf1000000. Fix DEBUG_UART_BASE option for all 32-bit mvebu boards. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
54 lines
1.3 KiB
Text
54 lines
1.3 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SYS_TEXT_BASE=0x00800000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_TARGET_MAXBCM=y
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
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CONFIG_SPL_TEXT_BASE=0x40004030
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL=y
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CONFIG_DEBUG_UART_BASE=0xf1012000
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CONFIG_DEBUG_UART_CLOCK=250000000
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CONFIG_SYS_LOAD_ADDR=0x800000
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CONFIG_DEBUG_UART=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_PREBOOT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_I2C=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_SPI=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_TIME=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_SPI_MAX_HZ=50000000
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_ARP_TIMEOUT=200
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CONFIG_NET_RETRY_COUNT=50
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MVTWSI=y
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# CONFIG_MMC is not set
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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CONFIG_MII=y
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CONFIG_MVMDIO=y
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CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_KIRKWOOD_SPI=y
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