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8880edba06
Adds a class for MDIO MUXes, which control access to a series of downstream child MDIOs. MDIO MUX drivers are required to implement a select function used to switch between child buses. MUX children are registered as MDIO buses and they can be used just like regular MDIOs. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
190 lines
5 KiB
C
190 lines
5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR IBM-pibs */
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/*
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* Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
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*/
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/*----------------------------------------------------------------------------+
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| File Name: miiphy.h
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| Function: Include file defining PHY registers.
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| Author: Mark Wisner
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+----------------------------------------------------------------------------*/
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#ifndef _miiphy_h_
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#define _miiphy_h_
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#include <common.h>
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#include <linux/mii.h>
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#include <linux/list.h>
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#include <net.h>
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#include <phy.h>
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int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short *value);
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int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short value);
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int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
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unsigned char *model, unsigned char *rev);
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int miiphy_reset(const char *devname, unsigned char addr);
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int miiphy_speed(const char *devname, unsigned char addr);
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int miiphy_duplex(const char *devname, unsigned char addr);
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int miiphy_is_1000base_x(const char *devname, unsigned char addr);
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#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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int miiphy_link(const char *devname, unsigned char addr);
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#endif
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void miiphy_init(void);
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int miiphy_set_current_dev(const char *devname);
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const char *miiphy_get_current_dev(void);
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struct mii_dev *mdio_get_current_dev(void);
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struct list_head *mdio_get_list_head(void);
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struct mii_dev *miiphy_get_dev_by_name(const char *devname);
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struct phy_device *mdio_phydev_for_ethname(const char *devname);
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void miiphy_listdev(void);
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struct mii_dev *mdio_alloc(void);
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void mdio_free(struct mii_dev *bus);
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int mdio_register(struct mii_dev *bus);
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/**
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* mdio_register_seq - Register mdio bus with sequence number
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* @bus: mii device structure
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* @seq: sequence number
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*
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* Return: 0 if success, negative value if error
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*/
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int mdio_register_seq(struct mii_dev *bus, int seq);
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int mdio_unregister(struct mii_dev *bus);
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void mdio_list_devices(void);
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#ifdef CONFIG_BITBANGMII
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#define BB_MII_DEVNAME "bb_miiphy"
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struct bb_miiphy_bus {
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char name[16];
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int (*init)(struct bb_miiphy_bus *bus);
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int (*mdio_active)(struct bb_miiphy_bus *bus);
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int (*mdio_tristate)(struct bb_miiphy_bus *bus);
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int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
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int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
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int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
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int (*delay)(struct bb_miiphy_bus *bus);
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#ifdef CONFIG_BITBANGMII_MULTI
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void *priv;
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#endif
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};
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extern struct bb_miiphy_bus bb_miiphy_buses[];
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extern int bb_miiphy_buses_num;
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void bb_miiphy_init(void);
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int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg);
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int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
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u16 value);
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#endif
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/* phy seed setup */
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#define AUTO 99
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#define _1000BASET 1000
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#define _100BASET 100
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#define _10BASET 10
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#define HALF 22
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#define FULL 44
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/* phy register offsets */
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#define MII_MIPSCR 0x11
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/* MII_LPA */
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#define PHY_ANLPAR_PSB_802_3 0x0001
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#define PHY_ANLPAR_PSB_802_9 0x0002
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/* MII_CTRL1000 masks */
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#define PHY_1000BTCR_1000FD 0x0200
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#define PHY_1000BTCR_1000HD 0x0100
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/* MII_STAT1000 masks */
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#define PHY_1000BTSR_MSCF 0x8000
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#define PHY_1000BTSR_MSCR 0x4000
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#define PHY_1000BTSR_LRS 0x2000
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#define PHY_1000BTSR_RRS 0x1000
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#define PHY_1000BTSR_1000FD 0x0800
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#define PHY_1000BTSR_1000HD 0x0400
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/* phy EXSR */
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#define ESTATUS_1000XF 0x8000
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#define ESTATUS_1000XH 0x4000
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#ifdef CONFIG_DM_MDIO
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/**
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* struct mdio_perdev_priv - Per-device class data for MDIO DM
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*
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* @mii_bus: Supporting MII legacy bus
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*/
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struct mdio_perdev_priv {
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struct mii_dev *mii_bus;
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};
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/**
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* struct mdio_ops - MDIO bus operations
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*
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* @read: Read from a PHY register
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* @write: Write to a PHY register
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* @reset: Reset the MDIO bus, NULL if not supported
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*/
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struct mdio_ops {
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int (*read)(struct udevice *mdio_dev, int addr, int devad, int reg);
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int (*write)(struct udevice *mdio_dev, int addr, int devad, int reg,
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u16 val);
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int (*reset)(struct udevice *mdio_dev);
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};
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#define mdio_get_ops(dev) ((struct mdio_ops *)(dev)->driver->ops)
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/**
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* dm_mdio_probe_devices - Call probe on all MII devices, currently used for
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* MDIO console commands.
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*/
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void dm_mdio_probe_devices(void);
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/**
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* dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
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*
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* @dev: mdio dev
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* @addr: PHY address on MDIO bus
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* @ethdev: ethernet device to connect to the PHY
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* @interface: MAC-PHY protocol
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*
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* @return pointer to phy_device, or 0 on error
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*/
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struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr,
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struct udevice *ethdev,
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phy_interface_t interface);
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#endif
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#ifdef CONFIG_DM_MDIO_MUX
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/* indicates none of the child buses is selected */
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#define MDIO_MUX_SELECT_NONE -1
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/**
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* struct mdio_mux_ops - MDIO MUX operations
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*
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* @select: Selects a child bus
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* @deselect: Clean up selection. Optional, can be NULL
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*/
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struct mdio_mux_ops {
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int (*select)(struct udevice *mux, int cur, int sel);
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int (*deselect)(struct udevice *mux, int sel);
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};
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#define mdio_mux_get_ops(dev) ((struct mdio_mux_ops *)(dev)->driver->ops)
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#endif
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#endif
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