mirror of
https://github.com/AsahiLinux/u-boot
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ccea96f443
Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com>
96 lines
1.9 KiB
C
96 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 MediaTek Inc. All rights reserved.
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*
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* Author: Weijie Gao <weijie.gao@mediatek.com>
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*/
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#include <init.h>
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#include <image.h>
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#include <vsprintf.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/sections.h>
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#include <asm/addrspace.h>
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#include <asm/byteorder.h>
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#include <asm/global_data.h>
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#include <linux/sizes.h>
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#include <linux/types.h>
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#include <mach/serial.h>
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#include "../mt7621.h"
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#include "dram.h"
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#include <spl.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct tpl_info {
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u32 magic;
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u32 size;
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};
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void set_timer_freq_simple(void)
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{
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u32 div = get_xtal_mhz();
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/* Round down cpu freq */
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gd->arch.timer_freq = rounddown(CONFIG_MT7621_CPU_FREQ, div) * 500000;
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}
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void __noreturn board_init_f(ulong dummy)
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{
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spl_init();
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#ifdef CONFIG_SPL_SERIAL
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/*
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* mtmips_spl_serial_init() is useful if debug uart is enabled,
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* or DM based serial is not enabled.
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*/
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mtmips_spl_serial_init();
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preloader_console_init();
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#endif
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board_init_r(NULL, 0);
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}
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void board_boot_order(u32 *spl_boot_list)
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{
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#ifdef CONFIG_MT7621_BOOT_FROM_NAND
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spl_boot_list[0] = BOOT_DEVICE_NAND;
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#else
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spl_boot_list[0] = BOOT_DEVICE_NOR;
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#endif
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}
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unsigned long spl_nor_get_uboot_base(void)
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{
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const struct tpl_info *tpli;
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const struct legacy_img_hdr *hdr;
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u32 addr;
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addr = FLASH_MMAP_BASE + TPL_INFO_OFFSET;
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tpli = (const struct tpl_info *)KSEG1ADDR(addr);
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if (tpli->magic == TPL_INFO_MAGIC) {
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addr = FLASH_MMAP_BASE + tpli->size;
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hdr = (const struct legacy_img_hdr *)KSEG1ADDR(addr);
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if (image_get_magic(hdr) == IH_MAGIC) {
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addr += sizeof(*hdr) + image_get_size(hdr);
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return KSEG1ADDR(addr);
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}
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}
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panic("Unable to locate SPL payload\n");
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return 0;
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}
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uint32_t spl_nand_get_uboot_raw_page(void)
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{
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const struct stage_header *sh = (const struct stage_header *)_start;
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u32 addr;
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addr = image_get_header_size() + be32_to_cpu(sh->stage_size);
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addr = ALIGN(addr, SZ_4K);
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return addr;
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}
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