mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-25 12:33:41 +00:00
0a9e7ee5bd
We have done with the generic board conversion for all the boards of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86. Let's select SYS_GENERIC_BOARD for those architectures, so we can tell which architecture has finished the conversion at a glance. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
182 lines
5.1 KiB
C
182 lines
5.1 KiB
C
/*
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* config.h - setup common defines for Blackfin boards based on config.h
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*
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* Copyright (c) 2007-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_BLACKFIN_CONFIG_POST_H__
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#define __ASM_BLACKFIN_CONFIG_POST_H__
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/* Some of our defines use this (like CONFIG_SYS_GBL_DATA_ADDR) */
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#include <asm-offsets.h>
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/* Sanity check CONFIG_BFIN_CPU */
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#ifndef CONFIG_BFIN_CPU
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# error CONFIG_BFIN_CPU: your board config needs to define this
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#endif
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#ifndef CONFIG_BFIN_SCRATCH_REG
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# define CONFIG_BFIN_SCRATCH_REG retn
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#endif
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/* U-Boot wants this config name */
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#define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES
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/* Make sure the structure is properly aligned */
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#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR)
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# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned
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#endif
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/* Set default CONFIG_VCO_HZ if need be */
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#if !defined(CONFIG_VCO_HZ)
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# if (CONFIG_CLKIN_HALF == 0)
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# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
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# else
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# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2)
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# endif
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#endif
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/* Set default CONFIG_CCLK_HZ if need be */
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#if !defined(CONFIG_CCLK_HZ)
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# if (CONFIG_PLL_BYPASS == 0)
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# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV)
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# else
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# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
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# endif
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#endif
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/* Set default CONFIG_SCLK_HZ if need be */
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#if !defined(CONFIG_SCLK_HZ)
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# if (CONFIG_PLL_BYPASS == 0)
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# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV)
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# else
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# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
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# endif
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#endif
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/* Since we use these to program PLL registers directly,
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* make sure the values are sane and won't screw us up.
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*/
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#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT
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# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63)
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#endif
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#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF
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# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1
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#endif
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#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS
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# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1
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#endif
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/* If we are using KGDB, make sure we defer exceptions */
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#ifdef CONFIG_CMD_KGDB
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# define CONFIG_EXCEPTION_DEFER 1
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#endif
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/* Using L1 scratch pad makes sense for everyone by default. */
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#ifndef CONFIG_LINUX_CMDLINE_ADDR
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# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH
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#endif
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#ifndef CONFIG_LINUX_CMDLINE_SIZE
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# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE
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#endif
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/* Set default SPI flash CS to the one we boot from */
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#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS)
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# define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL
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#endif
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/* We need envcrc to embed the env into LDRs */
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#ifdef CONFIG_ENV_IS_EMBEDDED_IN_LDR
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# define CONFIG_BUILD_ENVCRC
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#endif
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/* Default/common Blackfin memory layout */
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#ifndef CONFIG_SYS_SDRAM_BASE
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# define CONFIG_SYS_SDRAM_BASE 0
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#endif
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#ifndef CONFIG_SYS_MAX_RAM_SIZE
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# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
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#endif
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#ifndef CONFIG_SYS_MONITOR_BASE
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# if CONFIG_SYS_MAX_RAM_SIZE
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# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN)
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# else
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# define CONFIG_SYS_MONITOR_BASE 0
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# endif
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#endif
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#ifndef CONFIG_SYS_MALLOC_BASE
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# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
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#endif
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#ifndef CONFIG_STACKBASE
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# define CONFIG_STACKBASE (CONFIG_SYS_MALLOC_BASE - 4)
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#endif
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#ifndef CONFIG_SYS_MEMTEST_START
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# define CONFIG_SYS_MEMTEST_START 0
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#endif
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#ifndef CONFIG_SYS_MEMTEST_END
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# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4)
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#endif
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#ifndef CONFIG_SYS_POST_WORD_ADDR
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# define CONFIG_SYS_POST_WORD_ADDR (L1_DATA_B_SRAM + L1_DATA_B_SRAM_SIZE - 4)
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#endif
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/* Check to make sure everything fits in external RAM */
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#if CONFIG_SYS_MAX_RAM_SIZE && \
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((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE)
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# error Memory Map does not fit into configuration
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#endif
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/* Default/common Blackfin environment settings */
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#ifndef CONFIG_LOADADDR
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# define CONFIG_LOADADDR 0x1000000
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#endif
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#ifndef CONFIG_SYS_LOAD_ADDR
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# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#endif
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#ifndef CONFIG_SYS_BOOTM_LEN
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# define CONFIG_SYS_BOOTM_LEN 0x4000000
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#endif
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#ifndef CONFIG_SYS_PROMPT
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# define CONFIG_SYS_PROMPT "bfin> "
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#endif
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#ifndef CONFIG_SYS_CBSIZE
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# define CONFIG_SYS_CBSIZE 1024
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#elif defined(CONFIG_CMD_KGDB) && CONFIG_SYS_CBSIZE < 1024
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# error "kgdb needs cbsize to be >= 1024"
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#endif
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#ifndef CONFIG_SYS_BARGSIZE
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# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#endif
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#ifndef CONFIG_SYS_PBSIZE
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# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#endif
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#ifndef CONFIG_SYS_MAXARGS
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# define CONFIG_SYS_MAXARGS 16
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#endif
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/* Blackfin POST tests */
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#ifdef CONFIG_POST_BSPEC1_GPIO_LEDS
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# define CONFIG_POST_BSPEC1 \
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{ \
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"LED test", "led", "This test verifies LEDs on the board.", \
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POST_MEM | POST_ALWAYS, &led_post_test, NULL, NULL, \
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CONFIG_SYS_POST_BSPEC1, \
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}
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#endif
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#ifdef CONFIG_POST_BSPEC2_GPIO_BUTTONS
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# define CONFIG_POST_BSPEC2 \
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{ \
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"Button test", "button", "This test verifies buttons on the board.", \
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POST_MEM | POST_ALWAYS, &button_post_test, NULL, NULL, \
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CONFIG_SYS_POST_BSPEC2, \
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}
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#endif
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_CPU CONFIG_BFIN_CPU
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#endif
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