mirror of
https://github.com/AsahiLinux/u-boot
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155d424a9a
Create a common header file for the RTC IP block that is shared between davinci and am33xx. Signed-off-by: Tom Rini <trini@ti.com>
893 lines
18 KiB
C
893 lines
18 KiB
C
/*
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* (C) Copyright 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on da830evm.c. Original Copyrights follow:
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*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <environment.h>
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#include <hwconfig.h>
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#include <i2c.h>
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#include <malloc.h>
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#include <miiphy.h>
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#include <mmc.h>
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#include <net.h>
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#include <netdev.h>
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#include <spi.h>
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#include <linux/ctype.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/da850_lowlevel.h>
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#include <asm/arch/davinci_misc.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux_defs.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sdmmc_defs.h>
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#include <asm/arch/timer_defs.h>
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#include <asm/davinci_rtc.h>
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DECLARE_GLOBAL_DATA_PTR;
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const struct lpsc_resource lpsc[] = {
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{ DAVINCI_LPSC_AEMIF },
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{ DAVINCI_LPSC_SPI1 },
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{ DAVINCI_LPSC_ARM_RAM_ROM },
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{ DAVINCI_LPSC_UART0 },
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{ DAVINCI_LPSC_EMAC },
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{ DAVINCI_LPSC_UART0 },
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{ DAVINCI_LPSC_GPIO },
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{ DAVINCI_LPSC_DDR_EMIF },
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{ DAVINCI_LPSC_UART1 },
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{ DAVINCI_LPSC_UART2 },
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{ DAVINCI_LPSC_MMC_SD1 },
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{ DAVINCI_LPSC_USB20 },
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{ DAVINCI_LPSC_USB11 },
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};
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const int lpsc_size = ARRAY_SIZE(lpsc);
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static const struct pinmux_config enbw_pins[] = {
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{ pinmux(0), 8, 0 },
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{ pinmux(0), 8, 1 },
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{ pinmux(0), 8, 2 },
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{ pinmux(0), 8, 3 },
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{ pinmux(0), 8, 4 },
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{ pinmux(0), 8, 5 },
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{ pinmux(1), 4, 0 },
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{ pinmux(1), 8, 1 },
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{ pinmux(1), 8, 2 },
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{ pinmux(1), 8, 3 },
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{ pinmux(1), 8, 4 },
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{ pinmux(1), 8, 5 },
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{ pinmux(1), 8, 6 },
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{ pinmux(1), 4, 7 },
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{ pinmux(2), 8, 0 },
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{ pinmux(5), 1, 0 },
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{ pinmux(5), 1, 3 },
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{ pinmux(5), 1, 7 },
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{ pinmux(5), 1, 5 },
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{ pinmux(5), 1, 4 },
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{ pinmux(5), 1, 3 },
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{ pinmux(5), 1, 2 },
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{ pinmux(5), 1, 1 },
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{ pinmux(5), 1, 0 },
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{ pinmux(6), 8, 0 },
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{ pinmux(6), 8, 1 },
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{ pinmux(6), 8, 2 },
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{ pinmux(6), 8, 3 },
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{ pinmux(6), 8, 4 },
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{ pinmux(6), 8, 5 },
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{ pinmux(6), 1, 7 },
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{ pinmux(7), 8, 2 },
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{ pinmux(7), 1, 3 },
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{ pinmux(7), 8, 6 },
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{ pinmux(7), 1, 7 },
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{ pinmux(13), 8, 2 },
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{ pinmux(13), 8, 3 },
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{ pinmux(13), 8, 4 },
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{ pinmux(13), 8, 5 },
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{ pinmux(13), 8, 6 },
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{ pinmux(13), 8, 7 },
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{ pinmux(14), 8, 0 },
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{ pinmux(14), 8, 1 },
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{ pinmux(16), 8, 1 },
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{ pinmux(16), 8, 2 },
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{ pinmux(16), 8, 3 },
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{ pinmux(16), 8, 4 },
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{ pinmux(16), 8, 5 },
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{ pinmux(16), 8, 6 },
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{ pinmux(16), 8, 7 },
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{ pinmux(17), 1, 0 },
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{ pinmux(17), 1, 1 },
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{ pinmux(17), 1, 2 },
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{ pinmux(17), 8, 3 },
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{ pinmux(17), 8, 4 },
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{ pinmux(17), 8, 5 },
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{ pinmux(17), 8, 6 },
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{ pinmux(17), 8, 7 },
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{ pinmux(18), 8, 0 },
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{ pinmux(18), 8, 1 },
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{ pinmux(18), 2, 2 },
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{ pinmux(18), 2, 3 },
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{ pinmux(18), 2, 4 },
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{ pinmux(18), 8, 6 },
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{ pinmux(18), 8, 7 },
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{ pinmux(19), 8, 0 },
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{ pinmux(19), 2, 1 },
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{ pinmux(19), 2, 2 },
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{ pinmux(19), 2, 3 },
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{ pinmux(19), 2, 4 },
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{ pinmux(19), 8, 5 },
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{ pinmux(19), 8, 6 },
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};
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const struct pinmux_resource pinmuxes[] = {
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PINMUX_ITEM(emac_pins_mii),
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PINMUX_ITEM(emac_pins_mdio),
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PINMUX_ITEM(i2c0_pins),
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PINMUX_ITEM(emifa_pins_cs2),
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PINMUX_ITEM(emifa_pins_cs3),
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PINMUX_ITEM(emifa_pins_cs4),
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PINMUX_ITEM(emifa_pins_nand),
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PINMUX_ITEM(emifa_pins_nor),
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PINMUX_ITEM(spi1_pins_base),
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PINMUX_ITEM(spi1_pins_scs0),
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PINMUX_ITEM(uart1_pins_txrx),
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PINMUX_ITEM(uart2_pins_txrx),
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PINMUX_ITEM(uart2_pins_rtscts),
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PINMUX_ITEM(enbw_pins),
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};
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const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
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struct gpio_config {
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char name[GPIO_NAME_SIZE];
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unsigned char bank;
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unsigned char gpio;
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unsigned char out;
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unsigned char value;
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};
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static const struct gpio_config enbw_gpio_config_hut[] = {
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{ "RS485 enable", 8, 11, 1, 0 },
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{ "RS485 iso", 8, 10, 1, 1 },
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{ "W2HUT RS485 Rx ena", 8, 9, 1, 0 },
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{ "W2HUT RS485 iso", 8, 8, 1, 1 },
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};
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static const struct gpio_config enbw_gpio_config_w[] = {
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{ "RS485 enable", 8, 11, 1, 0 },
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{ "RS485 iso", 8, 10, 1, 0 },
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{ "W2HUT RS485 Rx ena", 8, 9, 1, 0 },
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{ "W2HUT RS485 iso", 8, 8, 1, 0 },
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};
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static const struct gpio_config enbw_gpio_config[] = {
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{ "LAN reset", 7, 15, 1, 1 },
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{ "ena 11V PLC", 7, 14, 1, 0 },
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{ "ena 1.5V PLC", 7, 13, 1, 0 },
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{ "disable VBUS", 7, 12, 1, 1 },
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{ "PLC reset", 6, 13, 1, 0 },
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{ "LCM RS", 6, 12, 1, 0 },
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{ "LCM R/W", 6, 11, 1, 0 },
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{ "PLC pairing", 6, 10, 1, 1 },
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{ "PLC MDIO CLK", 6, 9, 1, 0 },
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{ "HK218", 6, 8, 1, 0 },
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{ "HK218 Rx", 6, 1, 1, 1 },
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{ "TPM reset", 6, 0, 1, 0 },
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{ "Board-Type", 3, 9, 0, 0 },
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{ "HW-ID0", 2, 7, 0, 0 },
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{ "HW-ID1", 2, 6, 0, 0 },
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{ "HW-ID2", 2, 3, 0, 0 },
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{ "PV-IF RxD ena", 0, 15, 1, 1 },
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{ "LED1", 1, 15, 1, 1 },
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{ "LED2", 0, 1, 1, 1 },
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{ "LED3", 0, 2, 1, 1 },
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{ "LED4", 0, 3, 1, 1 },
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{ "LED5", 0, 4, 1, 1 },
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{ "LED6", 0, 5, 1, 0 },
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{ "LED7", 0, 6, 1, 0 },
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{ "LED8", 0, 14, 1, 0 },
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{ "USER1", 0, 12, 0, 0 },
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{ "USER2", 0, 13, 0, 0 },
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};
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#define PHY_POWER 0x0800
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static void enbw_cmc_switch(int port, int on)
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{
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const char *devname;
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unsigned char phyaddr = 3;
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unsigned char reg = 0;
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unsigned short data;
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if (port == 1)
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phyaddr = 2;
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devname = miiphy_get_current_dev();
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if (!devname) {
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printf("Error: no mii device\n");
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return;
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}
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if (miiphy_read(devname, phyaddr, reg, &data) != 0) {
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printf("Error reading from the PHY addr=%02x reg=%02x\n",
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phyaddr, reg);
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return;
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}
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if (on)
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data &= ~PHY_POWER;
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else
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data |= PHY_POWER;
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if (miiphy_write(devname, phyaddr, reg, data) != 0) {
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printf("Error writing to the PHY addr=%02x reg=%02x\n",
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phyaddr, reg);
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return;
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}
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}
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static int enbw_cmc_init_gpio(const struct gpio_config *conf, int sz)
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{
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int i, ret;
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for (i = 0; i < sz; i++) {
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int gpio = conf[i].bank * 16 +
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conf[i].gpio;
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ret = gpio_request(gpio, conf[i].name);
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if (ret) {
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printf("%s: Could not get %s gpio\n", __func__,
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conf[i].name);
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return ret;
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}
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if (conf[i].out)
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gpio_direction_output(gpio,
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conf[i].value);
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else
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gpio_direction_input(gpio);
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}
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return 0;
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}
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int board_init(void)
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{
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int board_type, hw_id;
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#ifndef CONFIG_USE_IRQ
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irq_init();
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#endif
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/* address of boot parameters, not used as booting with DTT */
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gd->bd->bi_boot_params = 0;
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enbw_cmc_init_gpio(enbw_gpio_config, ARRAY_SIZE(enbw_gpio_config));
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/* detect HW version */
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board_type = gpio_get_value(CONFIG_ENBW_CMC_BOARD_TYPE);
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hw_id = gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT0) +
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(gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT1) << 1) +
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(gpio_get_value(CONFIG_ENBW_CMC_HW_ID_BIT2) << 2);
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printf("BOARD: CMC-%s hw id: %d\n", (board_type ? "w2" : "hut"),
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hw_id);
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if (board_type)
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enbw_cmc_init_gpio(enbw_gpio_config_w,
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ARRAY_SIZE(enbw_gpio_config_w));
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else
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enbw_cmc_init_gpio(enbw_gpio_config_hut,
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ARRAY_SIZE(enbw_gpio_config_hut));
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/* setup the SUSPSRC for ARM to control emulation suspend */
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clrbits_le32(&davinci_syscfg_regs->suspsrc,
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(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
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DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
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DAVINCI_SYSCFG_SUSPSRC_UART2));
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return 0;
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}
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#ifdef CONFIG_DRIVER_TI_EMAC
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#define KSZ_CMD_READ 0x03
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#define KSZ_CMD_WRITE 0x02
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#define KSZ_ID 0x95
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static int enbw_cmc_switch_read(struct spi_slave *spi, u8 reg, u8 *val)
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{
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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int cmd_len;
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u8 cmd[2];
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cmd[0] = KSZ_CMD_READ;
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cmd[1] = reg;
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cmd_len = 2;
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ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
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if (ret) {
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debug("Failed to send command (%zu bytes): %d\n",
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cmd_len, ret);
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return -EINVAL;
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}
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flags |= SPI_XFER_END;
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*val = 0;
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cmd_len = 1;
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ret = spi_xfer(spi, cmd_len * 8, NULL, val, flags);
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if (ret) {
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debug("Failed to read (%zu bytes): %d\n",
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cmd_len, ret);
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return -EINVAL;
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}
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return 0;
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}
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static int enbw_cmc_switch_read_ident(struct spi_slave *spi)
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{
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int ret;
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u8 val;
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ret = enbw_cmc_switch_read(spi, 0, &val);
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if (ret) {
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debug("Failed to read\n");
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return -EINVAL;
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}
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if (val != KSZ_ID)
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return -EINVAL;
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return 0;
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}
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static int enbw_cmc_switch_write(struct spi_slave *spi, unsigned long reg,
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unsigned long val)
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{
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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int cmd_len;
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u8 cmd[3];
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cmd[0] = KSZ_CMD_WRITE;
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cmd[1] = reg;
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cmd[2] = val;
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cmd_len = 3;
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flags |= SPI_XFER_END;
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ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
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if (ret) {
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debug("Failed to send command (%zu bytes): %d\n",
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cmd_len, ret);
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return -EINVAL;
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}
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udelay(1000);
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ret = enbw_cmc_switch_read(spi, reg, &cmd[0]);
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if (ret) {
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debug("Failed to read\n");
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return -EINVAL;
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}
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if (val != cmd[0])
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debug("warning: reg: %lx va: %x soll: %lx\n",
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reg, cmd[0], val);
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return 0;
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}
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static int enbw_cmc_eof(unsigned char *ptr)
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{
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if (*ptr == 0xff)
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return 1;
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return 0;
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}
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static char *enbw_cmc_getnewline(char *ptr)
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{
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while (*ptr != 0x0a) {
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ptr++;
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if (enbw_cmc_eof((unsigned char *)ptr))
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return NULL;
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}
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ptr++;
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return ptr;
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}
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static char *enbw_cmc_getvalue(char *ptr, int *value)
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{
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int end = 0;
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*value = -EINVAL;
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if (!isxdigit(*ptr))
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end = 1;
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while (end) {
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if ((*ptr == '#') || (*ptr == ';')) {
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ptr = enbw_cmc_getnewline(ptr);
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return ptr;
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}
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if (ptr != NULL) {
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if (isxdigit(*ptr)) {
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end = 0;
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} else if (*ptr == 0x0a) {
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ptr++;
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return ptr;
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} else {
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ptr++;
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if (enbw_cmc_eof((unsigned char *)ptr))
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return NULL;
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}
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} else {
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return NULL;
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}
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}
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*value = (int)simple_strtoul((const char *)ptr, &ptr, 16);
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ptr++;
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return ptr;
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}
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static struct spi_slave *enbw_cmc_init_spi(void)
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{
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struct spi_slave *spi;
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int ret;
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spi = spi_setup_slave(0, 0, 1000000, 0);
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if (!spi) {
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printf("Failed to set up slave\n");
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return NULL;
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}
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ret = spi_claim_bus(spi);
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if (ret) {
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debug("Failed to claim SPI bus: %d\n", ret);
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goto err_claim_bus;
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}
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ret = enbw_cmc_switch_read_ident(spi);
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if (ret)
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goto err_read;
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return spi;
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err_read:
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spi_release_bus(spi);
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err_claim_bus:
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spi_free_slave(spi);
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return NULL;
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}
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static int enbw_cmc_config_switch(unsigned long addr)
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{
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struct spi_slave *spi;
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char *ptr = (char *)addr;
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int value, reg;
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int ret = 0;
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debug("configure switch with file on addr: 0x%lx\n", addr);
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spi = enbw_cmc_init_spi();
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if (!spi)
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return -EINVAL;
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while (ptr != NULL) {
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ptr = enbw_cmc_getvalue(ptr, ®);
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if (ptr != NULL) {
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ptr = enbw_cmc_getvalue(ptr, &value);
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if ((ptr != NULL) && (value >= 0))
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if (enbw_cmc_switch_write(spi, reg, value)) {
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/* error writing to switch */
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ptr = NULL;
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ret = -EINVAL;
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}
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}
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}
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spi_release_bus(spi);
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spi_free_slave(spi);
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return ret;
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}
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static int do_switch(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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{
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unsigned long addr;
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if (argc < 2)
|
|
return cmd_usage(cmdtp);
|
|
|
|
addr = simple_strtoul(argv[1], NULL, 16);
|
|
enbw_cmc_config_switch(addr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
U_BOOT_CMD(switch, 3, 1, do_switch,
|
|
"switch addr",
|
|
"[addr]"
|
|
);
|
|
|
|
/*
|
|
* Initializes on-board ethernet controllers.
|
|
*/
|
|
int board_eth_init(bd_t *bis)
|
|
{
|
|
struct spi_slave *spi;
|
|
const char *s;
|
|
size_t len = 0;
|
|
int config = 1;
|
|
|
|
davinci_emac_mii_mode_sel(0);
|
|
|
|
/* send a config file to the switch */
|
|
s = hwconfig_subarg("switch", "config", &len);
|
|
if (len) {
|
|
unsigned long addr = simple_strtoul(s, NULL, 16);
|
|
|
|
config = enbw_cmc_config_switch(addr);
|
|
}
|
|
|
|
if (config) {
|
|
/*
|
|
* no valid config file -> do we have some args in
|
|
* hwconfig ?
|
|
*/
|
|
if ((hwconfig_subarg("switch", "lan", &len)) ||
|
|
(hwconfig_subarg("switch", "lmn", &len))) {
|
|
/* If so start switch */
|
|
spi = enbw_cmc_init_spi();
|
|
if (spi) {
|
|
if (enbw_cmc_switch_write(spi, 1, 0))
|
|
config = 0;
|
|
udelay(10000);
|
|
if (enbw_cmc_switch_write(spi, 1, 1))
|
|
config = 0;
|
|
spi_release_bus(spi);
|
|
spi_free_slave(spi);
|
|
}
|
|
} else {
|
|
config = 0;
|
|
}
|
|
}
|
|
if (!davinci_emac_initialize()) {
|
|
printf("Error: Ethernet init failed!\n");
|
|
return -1;
|
|
}
|
|
|
|
if (config) {
|
|
if (hwconfig_subarg_cmp("switch", "lan", "on"))
|
|
/* Switch port lan on */
|
|
enbw_cmc_switch(1, 1);
|
|
else
|
|
enbw_cmc_switch(1, 0);
|
|
|
|
if (hwconfig_subarg_cmp("switch", "lmn", "on"))
|
|
/* Switch port pwl on */
|
|
enbw_cmc_switch(2, 1);
|
|
else
|
|
enbw_cmc_switch(2, 0);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_DRIVER_TI_EMAC */
|
|
|
|
#ifdef CONFIG_PREBOOT
|
|
static uchar kbd_magic_prefix[] = "key_magic_";
|
|
static uchar kbd_command_prefix[] = "key_cmd_";
|
|
|
|
struct kbd_data_t {
|
|
char s1;
|
|
};
|
|
|
|
struct kbd_data_t *get_keys(struct kbd_data_t *kbd_data)
|
|
{
|
|
/* read SW1 + SW2 */
|
|
kbd_data->s1 = gpio_get_value(12) +
|
|
(gpio_get_value(13) << 1);
|
|
return kbd_data;
|
|
}
|
|
|
|
static int compare_magic(const struct kbd_data_t *kbd_data, char *str)
|
|
{
|
|
char s1 = str[0];
|
|
|
|
if (s1 >= '0' && s1 <= '9')
|
|
s1 -= '0';
|
|
else if (s1 >= 'a' && s1 <= 'f')
|
|
s1 = s1 - 'a' + 10;
|
|
else if (s1 >= 'A' && s1 <= 'F')
|
|
s1 = s1 - 'A' + 10;
|
|
else
|
|
return -1;
|
|
|
|
if (s1 != kbd_data->s1)
|
|
return -1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static char *key_match(const struct kbd_data_t *kbd_data)
|
|
{
|
|
char magic[sizeof(kbd_magic_prefix) + 1];
|
|
char *suffix;
|
|
char *kbd_magic_keys;
|
|
|
|
/*
|
|
* The following string defines the characters that can be appended
|
|
* to "key_magic" to form the names of environment variables that
|
|
* hold "magic" key codes, i. e. such key codes that can cause
|
|
* pre-boot actions. If the string is empty (""), then only
|
|
* "key_magic" is checked (old behaviour); the string "125" causes
|
|
* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
|
|
*/
|
|
kbd_magic_keys = getenv("magic_keys");
|
|
if (kbd_magic_keys == NULL)
|
|
kbd_magic_keys = "";
|
|
|
|
/*
|
|
* loop over all magic keys;
|
|
* use '\0' suffix in case of empty string
|
|
*/
|
|
for (suffix = kbd_magic_keys; *suffix ||
|
|
suffix == kbd_magic_keys; ++suffix) {
|
|
sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
|
|
|
|
if (compare_magic(kbd_data, getenv(magic)) == 0) {
|
|
char cmd_name[sizeof(kbd_command_prefix) + 1];
|
|
char *cmd;
|
|
|
|
sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
|
|
cmd = getenv(cmd_name);
|
|
|
|
return cmd;
|
|
}
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
#endif /* CONFIG_PREBOOT */
|
|
|
|
int misc_init_r(void)
|
|
{
|
|
char *s, buf[32];
|
|
#ifdef CONFIG_PREBOOT
|
|
struct kbd_data_t kbd_data;
|
|
/* Decode keys */
|
|
char *str = strdup(key_match(get_keys(&kbd_data)));
|
|
/* Set or delete definition */
|
|
setenv("preboot", str);
|
|
free(str);
|
|
#endif /* CONFIG_PREBOOT */
|
|
|
|
/* count all restarts, and save this in an environment var */
|
|
s = getenv("restartcount");
|
|
|
|
if (s)
|
|
sprintf(buf, "%ld", simple_strtoul(s, NULL, 10) + 1);
|
|
else
|
|
strcpy(buf, "1");
|
|
|
|
setenv("restartcount", buf);
|
|
saveenv();
|
|
|
|
#ifdef CONFIG_HW_WATCHDOG
|
|
davinci_hw_watchdog_enable();
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct cmc_led {
|
|
char name[20];
|
|
unsigned char bank;
|
|
unsigned char gpio;
|
|
};
|
|
|
|
struct cmc_led led_table[] = {
|
|
{"led1", 1, 15},
|
|
{"led2", 0, 1},
|
|
{"led3", 0, 2},
|
|
{"led4", 0, 3},
|
|
{"led5", 0, 4},
|
|
{"led6", 0, 5},
|
|
{"led7", 0, 6},
|
|
{"led8", 0, 14},
|
|
};
|
|
|
|
static int cmc_get_led_state(struct cmc_led *led)
|
|
{
|
|
int value;
|
|
int gpio = led->bank * 16 + led->gpio;
|
|
|
|
value = gpio_get_value(gpio);
|
|
|
|
return value;
|
|
}
|
|
|
|
static int cmc_set_led_state(struct cmc_led *led, int state)
|
|
{
|
|
int gpio = led->bank * 16 + led->gpio;
|
|
|
|
gpio_set_value(gpio, state);
|
|
return 0;
|
|
}
|
|
|
|
static int do_led(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
|
|
{
|
|
struct cmc_led *led;
|
|
int found = 0;
|
|
int i = 0;
|
|
int only_print = 0;
|
|
int len = ARRAY_SIZE(led_table);
|
|
|
|
if (argc < 2)
|
|
return cmd_usage(cmdtp);
|
|
|
|
if (argc < 3)
|
|
only_print = 1;
|
|
|
|
led = led_table;
|
|
while ((!found) && (i < len)) {
|
|
if (strcmp(argv[1], led->name) == 0) {
|
|
found = 1;
|
|
} else {
|
|
led++;
|
|
i++;
|
|
}
|
|
}
|
|
if (!found)
|
|
return cmd_usage(cmdtp);
|
|
|
|
if (only_print) {
|
|
if (cmc_get_led_state(led))
|
|
printf("on\n");
|
|
else
|
|
printf("off\n");
|
|
|
|
return 0;
|
|
}
|
|
if (strcmp(argv[2], "on") == 0)
|
|
cmc_set_led_state(led, 1);
|
|
else
|
|
cmc_set_led_state(led, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
U_BOOT_CMD(led, 3, 1, do_led,
|
|
"switch on/off board led",
|
|
"[name] [on/off]"
|
|
);
|
|
|
|
#ifdef CONFIG_HW_WATCHDOG
|
|
void hw_watchdog_reset(void)
|
|
{
|
|
davinci_hw_watchdog_reset();
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_POST)
|
|
void arch_memory_failure_handle(void)
|
|
{
|
|
struct davinci_gpio *gpio = davinci_gpio_bank01;
|
|
int state = 1;
|
|
|
|
/*
|
|
* if memor< failure blink with the LED 1,2 and 3
|
|
* as we running from flash, we cannot use the gpio
|
|
* api here, so access the gpio pin direct through
|
|
* the gpio register.
|
|
*/
|
|
while (1) {
|
|
if (state) {
|
|
clrbits_le32(&gpio->out_data, 0x80000006);
|
|
state = 0;
|
|
} else {
|
|
setbits_le32(&gpio->out_data, 0x80000006);
|
|
state = 1;
|
|
}
|
|
udelay(500);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
ulong post_word_load(void)
|
|
{
|
|
struct davinci_rtc *reg =
|
|
(struct davinci_rtc *)CONFIG_SYS_POST_WORD_ADDR;
|
|
|
|
return in_be32(®->scratch2);
|
|
}
|
|
|
|
void post_word_store(ulong value)
|
|
{
|
|
struct davinci_rtc *reg =
|
|
(struct davinci_rtc *)CONFIG_SYS_POST_WORD_ADDR;
|
|
|
|
/*
|
|
* write RTC kick register to enable write
|
|
* for RTC Scratch registers. Cratch0 and 1 are
|
|
* used for bootcount values.
|
|
*/
|
|
writel(RTC_KICK0R_WE, ®->kick0r);
|
|
writel(RTC_KICK1R_WE, ®->kick1r);
|
|
out_be32(®->scratch2, value);
|
|
}
|
|
|
|
void board_gpio_init(void)
|
|
{
|
|
struct davinci_gpio *gpio = davinci_gpio_bank01;
|
|
|
|
/*
|
|
* set LED (gpio Interface not usable here)
|
|
* set LED pins to output and state 0
|
|
*/
|
|
clrbits_le32(&gpio->dir, 0x8000407e);
|
|
clrbits_le32(&gpio->out_data, 0x8000407e);
|
|
/* set LED 1 - 5 to state on */
|
|
setbits_le32(&gpio->out_data, 0x8000001e);
|
|
|
|
/*
|
|
* set some gpio pins to low, this is needed early,
|
|
* so we have no gpio Interface here
|
|
* gpios:
|
|
* 8[8] Mode PV select low
|
|
* 8[9] Debug Rx Enable low
|
|
* 8[10] Mode Select PV low
|
|
* 8[11] Counter Interface RS485 Rx-Enable low
|
|
*/
|
|
gpio = davinci_gpio_bank8;
|
|
clrbits_le32(&gpio->dir, 0x00000f00);
|
|
clrbits_le32(&gpio->out_data, 0x0f00);
|
|
}
|
|
|
|
int board_late_init(void)
|
|
{
|
|
cmc_set_led_state(&led_table[4], 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void show_boot_progress(int val)
|
|
{
|
|
switch (val) {
|
|
case 1:
|
|
cmc_set_led_state(&led_table[4], 1);
|
|
break;
|
|
case 4:
|
|
cmc_set_led_state(&led_table[4], 0);
|
|
break;
|
|
case 15:
|
|
cmc_set_led_state(&led_table[4], 1);
|
|
break;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_DAVINCI_MMC
|
|
static struct davinci_mmc mmc_sd1 = {
|
|
.reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
|
|
.input_clk = 228000000,
|
|
.host_caps = MMC_MODE_4BIT,
|
|
.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
|
|
.version = MMC_CTLR_VERSION_2,
|
|
};
|
|
|
|
int board_mmc_init(bd_t *bis)
|
|
{
|
|
mmc_sd1.input_clk = clk_get(DAVINCI_MMC_CLKID);
|
|
/* Add slot-0 to mmc subsystem */
|
|
return davinci_mmc_init(bis, &mmc_sd1);
|
|
}
|
|
#endif
|