mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
c935d3bd8b
- more documentation for NIOS port
- new struct nios_pio_t, struct nios_spi_t
- Reconfiguration for NIOS Development Kit DK1C20:
o move board related code from board/dk1c20
to board/altera/dk1c20
o create a new common source path board/altera/common
and move generic flash access stuff into it
o change/expand configuration file DK1C20.h
- Add support for NIOS Development Kit DK1S10
- Add status LED support for NIOS systems
- Add dual 7-segment LED support for Altera NIOS DevKits
140 lines
5.9 KiB
Text
140 lines
5.9 KiB
Text
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===============================================================================
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C F G _ N I O S _ C P U _ * v s . N I O S S D K
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===============================================================================
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When ever you have to make a new NIOS CPU configuration you can use this table
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as a reference list to the original NIOS SDK symbols made by Alteras SOPC
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Builder. Look into excalibur.h and excalibur.s in your SDK path cpu_sdk/inc.
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Symbols beginning with a '[ptf]:' are coming from your SOPC sytem description
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(PTF file) in sections WIZARD_SCRIPT_ARGUMENTS or SYSTEM_BUILDER_INFO.
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C O R E N I O S S D K [1],[7]
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_CLK nasys_clock_freq
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CFG_NIOS_CPU_ICACHE nasys_icache_size
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CFG_NIOS_CPU_DCACHE nasys_dcache_size
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CFG_NIOS_CPU_REG_NUMS nasys_nios_num_regs
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CFG_NIOS_CPU_MUL __nios_use_multiply__
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CFG_NIOS_CPU_MSTEP __nios_use_mstep__
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CFG_NIOS_CPU_STACK nasys_stack_top
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CFG_NIOS_CPU_VEC_BASE nasys_vector_table
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CFG_NIOS_CPU_VEC_SIZE nasys_vector_table_size
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CFG_NIOS_CPU_VEC_NUMS
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CFG_NIOS_CPU_RST_VECT nasys_reset_address
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CFG_NIOS_CPU_DBG_CORE nasys_debug_core
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CFG_NIOS_CPU_RAM_BASE na_onchip_ram_64_kbytes
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CFG_NIOS_CPU_RAM_SIZE na_onchip_ram_64_kbytes_size
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CFG_NIOS_CPU_ROM_BASE na_boot_monitor_rom
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CFG_NIOS_CPU_ROM_SIZE na_boot_monitor_rom_size
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CFG_NIOS_CPU_OCI_BASE nasys_oci_core
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CFG_NIOS_CPU_OCI_SIZE
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CFG_NIOS_CPU_SRAM_BASE na_ext_ram nasys_program_mem
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nasys_data_mem
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CFG_NIOS_CPU_SRAM_SIZE na_ext_ram_size nasys_program_mem_size
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nasys_data_mem_size
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CFG_NIOS_CPU_SDRAM_BASE na_sdram
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CFG_NIOS_CPU_SDRAM_SIZE na_sdram_size
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CFG_NIOS_CPU_FLASH_BASE na_ext_flash nasys_main_flash
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nasys_am29lv065d_flash_0
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nasys_flash_0
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CFG_NIOS_CPU_FLASH_SIZE na_ext_flash_size nasys_main_flash_size
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T I M E R N I O S S D K [3]
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_TIMER_NUMS nasys_timer_count
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CFG_NIOS_CPU_TIMER[0-9] nasys_timer_[0-9]
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CFG_NIOS_CPU_TIMER[0-9]_IRQ nasys_timer_[0-9]_irq
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CFG_NIOS_CPU_TIMER[0-9]_PER [ptf]:period
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[ptf]:period_units
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[ptf]:mult
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CFG_NIOS_CPU_TIMER[0-9]_AR [ptf]:always_run
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CFG_NIOS_CPU_TIMER[0-9]_FP [ptf]:fixed_period
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CFG_NIOS_CPU_TIMER[0-9]_SS [ptf]:snapshot
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U A R T N I O S S D K [2]
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_UART_NUMS nasys_uart_count
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CFG_NIOS_CPU_UART[0-9] nasys_uart_[0-9]
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CFG_NIOS_CPU_UART[0-9]_IRQ nasys_uart_[0-9]_irq
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CFG_NIOS_CPU_UART[0-9]_BR [ptf]:baud
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CFG_NIOS_CPU_UART[0-9]_DB [ptf]:data_bits
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CFG_NIOS_CPU_UART[0-9]_SB [ptf]:stop_bits
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CFG_NIOS_CPU_UART[0-9]_PA [ptf]:parity
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CFG_NIOS_CPU_UART[0-9]_HS [ptf]:use_cts_rts
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CFG_NIOS_CPU_UART[0-9]_EOP [ptf]:use_eop_register
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P I O N I O S S D K [4]
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_PIO_NUMS nasys_pio_count
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CFG_NIOS_CPU_PIO[0-9] nasys_pio_[0-9]
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CFG_NIOS_CPU_PIO[0-9]_IRQ nasys_pio_[0-9]_irq
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CFG_NIOS_CPU_PIO[0-9]_BITS [ptf]:Data_Width
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CFG_NIOS_CPU_PIO[0-9]_TYPE [ptf]:has_tri
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[ptf]:has_out
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[ptf]:has_in
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CFG_NIOS_CPU_PIO[0-9]_CAP [ptf]:capture
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CFG_NIOS_CPU_PIO[0-9]_EDGE [ptf]:edge_type
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CFG_NIOS_CPU_PIO[0-9]_ITYPE [ptf]:irq_type
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S P I N I O S S D K [6]
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_SPI_NUMS nasys_spi_count
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CFG_NIOS_CPU_SPI[0-9] nasys_spi_[0-9]
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CFG_NIOS_CPU_SPI[0-9]_IRQ nasys_spi_[0-9]_irq
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CFG_NIOS_CPU_SPI[0-9]_BITS [ptf]:databits
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CFG_NIOS_CPU_SPI[0-9]_MA [ptf]:ismaster
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CFG_NIOS_CPU_SPI[0-9]_SLN [ptf]:numslaves
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CFG_NIOS_CPU_SPI[0-9]_TCLK [ptf]:targetclock
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CFG_NIOS_CPU_SPI[0-9]_TDELAY [ptf]:targetdelay
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CFG_NIOS_CPU_SPI[0-9]_* [ptf]:*
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I D E N I O S S D K
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_IDE_NUMS nasys_usersocket_count
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CFG_NIOS_CPU_IDE[0-9] nasys_usersocket_[0-9]
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A S M I N I O S S D K [5]
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_ASMI_NUMS nasys_asmi_count
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CFG_NIOS_CPU_ASMI[0-9] nasys_asmi_[0-9]
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CFG_NIOS_CPU_ASMI[0-9]_IRQ nasys_asmi_[0-9]_irq
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E t h e r n e t ( L A N ) N I O S S D K
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_LAN_NUMS
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CFG_NIOS_CPU_LAN[0-9]_BASE na_lan91c111
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CFG_NIOS_CPU_LAN[0-9]_OFFS LAN91C111_REGISTERS_OFFSET
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CFG_NIOS_CPU_LAN[0-9]_IRQ na_lan91c111_irq
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CFG_NIOS_CPU_LAN[0-9]_BUSW LAN91C111_DATA_BUS_WIDTH
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CFG_NIOS_CPU_LAN[0-9]_TYPE
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s y s t e m c o m p o s i n g N I O S S D K
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-------------------------------------------------------------------------------
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CFG_NIOS_CPU_TICK_TIMER (na_low_priority_timer2)
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CFG_NIOS_CPU_USER_TIMER (na_timer1)
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CFG_NIOS_CPU_BUTTON_PIO (na_button_pio)
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CFG_NIOS_CPU_LCD_PIO (na_lcd_pio)
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CFG_NIOS_CPU_LED_PIO (na_led_pio)
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CFG_NIOS_CPU_SEVENSEG_PIO (na_seven_seg_pio)
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CFG_NIOS_CPU_RECONF_PIO (na_reconfig_request_pio)
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CFG_NIOS_CPU_CFPRESENT_PIO (na_cf_present_pio)
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CFG_NIOS_CPU_CFPOWER_PIO (na_cf_power_pio)
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CFG_NIOS_CPU_CFATASEL_PIO (na_cf_ata_select_pio)
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CFG_NIOS_CPU_USER_SPI (na_spi)
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===============================================================================
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R E F E R E N C E S
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===============================================================================
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[1] http://www.altera.com/literature/ds/ds_nioscpu.pdf
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[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
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[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
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[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
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[5] http://www.altera.com/literature/ds/ds_nios_asmi.pdf
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[6] http://www.altera.com/literature/ds/ds_nios_spi.pdf
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[7] http://www.altera.com/literature/ds/ds_legacy_sdram_ctrl.pdf
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===============================================================================
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Stephan Linz <linz@li-pro.net>
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