mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 05:42:58 +00:00
b64af30a9d
phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM. As a result, all the board code of the phycore-imx8mm is used. Device tree synced with kernel v6.7. Signed-off-by: Yannic Moog <y.moog@phytec.de> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
115 lines
2.9 KiB
Text
115 lines
2.9 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_ARCH_IMX8M=y
|
|
CONFIG_TEXT_BASE=0x40200000
|
|
CONFIG_SYS_MALLOC_LEN=0x2000000
|
|
CONFIG_SPL_GPIO=y
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_ENV_SIZE=0x10000
|
|
CONFIG_ENV_OFFSET=0x3C0000
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="imx8mm-phygate-tauri-l"
|
|
CONFIG_SPL_TEXT_BASE=0x7E1000
|
|
CONFIG_TARGET_PHYCORE_IMX8MM=y
|
|
CONFIG_SYS_MONITOR_LEN=524288
|
|
CONFIG_SPL_MMC=y
|
|
CONFIG_SPL_SERIAL=y
|
|
CONFIG_SPL_DRIVERS_MISC=y
|
|
CONFIG_SPL_STACK=0x920000
|
|
CONFIG_SPL=y
|
|
CONFIG_ENV_OFFSET_REDUND=0x3E0000
|
|
CONFIG_SYS_LOAD_ADDR=0x40480000
|
|
CONFIG_LTO=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_OF_SYSTEM_SETUP=y
|
|
CONFIG_USE_BOOTCOMMAND=y
|
|
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
|
|
CONFIG_DEFAULT_FDT_FILE="oftree"
|
|
CONFIG_SYS_CBSIZE=2048
|
|
CONFIG_SYS_PBSIZE=2074
|
|
CONFIG_BOARD_LATE_INIT=y
|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
CONFIG_SPL_BSS_START_ADDR=0x910000
|
|
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
CONFIG_SPL_SYS_MALLOC=y
|
|
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
|
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
|
|
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
|
|
CONFIG_SPL_I2C=y
|
|
CONFIG_SPL_POWER=y
|
|
CONFIG_SPL_WATCHDOG=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_SYS_PROMPT="u-boot=> "
|
|
CONFIG_SYS_MAXARGS=64
|
|
# CONFIG_CMD_EXPORTENV is not set
|
|
# CONFIG_CMD_IMPORTENV is not set
|
|
# CONFIG_CMD_CRC32 is not set
|
|
CONFIG_CMD_EEPROM=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
|
CONFIG_SYS_EEPROM_SIZE=4096
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
|
CONFIG_CMD_CLK=y
|
|
CONFIG_CMD_FUSE=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_DHCP=y
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_CMD_EXT4=y
|
|
CONFIG_CMD_EXT4_WRITE=y
|
|
CONFIG_CMD_FAT=y
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_SYS_MMC_ENV_DEV=2
|
|
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
|
CONFIG_SPL_DM=y
|
|
CONFIG_SPL_CLK_COMPOSITE_CCF=y
|
|
CONFIG_CLK_COMPOSITE_CCF=y
|
|
CONFIG_SPL_CLK_IMX8MM=y
|
|
CONFIG_CLK_IMX8MM=y
|
|
CONFIG_MXC_GPIO=y
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_MISC=y
|
|
CONFIG_I2C_EEPROM=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x51
|
|
CONFIG_SUPPORT_EMMC_BOOT=y
|
|
CONFIG_MMC_IO_VOLTAGE=y
|
|
CONFIG_MMC_UHS_SUPPORT=y
|
|
CONFIG_MMC_HS400_ES_SUPPORT=y
|
|
CONFIG_MMC_HS400_SUPPORT=y
|
|
CONFIG_FSL_USDHC=y
|
|
CONFIG_PHYLIB=y
|
|
CONFIG_PHY_TI_DP83867=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_FEC_MXC=y
|
|
CONFIG_MII=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_PINCTRL_IMX8M=y
|
|
CONFIG_POWER_DOMAIN=y
|
|
CONFIG_IMX8M_POWER_DOMAIN=y
|
|
CONFIG_DM_REGULATOR=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_DM_REGULATOR_GPIO=y
|
|
CONFIG_DM_SERIAL=y
|
|
CONFIG_MXC_UART=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_SPL_SYSRESET=y
|
|
CONFIG_SYSRESET_PSCI=y
|
|
CONFIG_SYSRESET_WATCHDOG=y
|
|
CONFIG_DM_THERMAL=y
|
|
CONFIG_IMX_WATCHDOG=y
|