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https://github.com/AsahiLinux/u-boot
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aafeefbdb8
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers instead of getting it via &immap->im_cpm. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
146 lines
4.3 KiB
C
146 lines
4.3 KiB
C
/*
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* MPC85xx I/O port pin manipulation functions
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*/
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#ifndef _ASM_IOPIN_85xx_H_
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#define _ASM_IOPIN_85xx_H_
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#include <linux/types.h>
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#include <asm/immap_85xx.h>
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#ifdef __KERNEL__
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typedef struct {
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u_char port:2; /* port number (A=0, B=1, C=2, D=3) */
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u_char pin:5; /* port pin (0-31) */
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u_char flag:1; /* for whatever */
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} iopin_t;
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#define IOPIN_PORTA 0
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#define IOPIN_PORTB 1
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#define IOPIN_PORTC 2
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#define IOPIN_PORTD 3
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extern __inline__ void iopin_set_high (iopin_t * iopin)
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{
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volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
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datp[iopin->port * 8] |= (1 << (31 - iopin->pin));
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}
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extern __inline__ void iopin_set_low (iopin_t * iopin)
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{
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volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
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datp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
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}
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extern __inline__ uint iopin_is_high (iopin_t * iopin)
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{
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volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
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return (datp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
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}
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extern __inline__ uint iopin_is_low (iopin_t * iopin)
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{
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volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
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return ((datp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
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}
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extern __inline__ void iopin_set_out (iopin_t * iopin)
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{
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volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
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dirp[iopin->port * 8] |= (1 << (31 - iopin->pin));
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}
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extern __inline__ void iopin_set_in (iopin_t * iopin)
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{
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volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
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dirp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
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}
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extern __inline__ uint iopin_is_out (iopin_t * iopin)
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{
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volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
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return (dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
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}
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extern __inline__ uint iopin_is_in (iopin_t * iopin)
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{
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volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
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return ((dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
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}
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extern __inline__ void iopin_set_odr (iopin_t * iopin)
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{
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volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
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odrp[iopin->port * 8] |= (1 << (31 - iopin->pin));
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}
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extern __inline__ void iopin_set_act (iopin_t * iopin)
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{
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volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
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odrp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
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}
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extern __inline__ uint iopin_is_odr (iopin_t * iopin)
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{
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volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
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return (odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
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}
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extern __inline__ uint iopin_is_act (iopin_t * iopin)
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{
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volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
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return ((odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
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}
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extern __inline__ void iopin_set_ded (iopin_t * iopin)
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{
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volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
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parp[iopin->port * 8] |= (1 << (31 - iopin->pin));
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}
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extern __inline__ void iopin_set_gen (iopin_t * iopin)
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{
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volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
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parp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
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}
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extern __inline__ uint iopin_is_ded (iopin_t * iopin)
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{
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volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
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return (parp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
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}
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extern __inline__ uint iopin_is_gen (iopin_t * iopin)
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{
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volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
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return ((parp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
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}
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extern __inline__ void iopin_set_opt2 (iopin_t * iopin)
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{
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volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
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sorp[iopin->port * 8] |= (1 << (31 - iopin->pin));
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}
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extern __inline__ void iopin_set_opt1 (iopin_t * iopin)
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{
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volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
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sorp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
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}
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extern __inline__ uint iopin_is_opt2 (iopin_t * iopin)
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{
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volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
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return (sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
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}
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extern __inline__ uint iopin_is_opt1 (iopin_t * iopin)
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{
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volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
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return ((sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_IOPIN_85xx_H_ */
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