mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-30 11:22:09 +00:00
7dc6068fc1
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...) mapped cacheable before relocation. Without this patch the device tree, located before the MALLOC area is not tagged cacheable just after relocation, before mmu reconfiguration. This patch reduces the duration for device tree parsing in lmb_init_and_reserve. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
65 lines
1.4 KiB
C
65 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*/
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#define LOG_CATEGORY LOGC_ARCH
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#include <common.h>
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#include <dm.h>
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#include <image.h>
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#include <init.h>
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#include <lmb.h>
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#include <log.h>
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#include <ram.h>
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#include <asm/global_data.h>
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#include <asm/system.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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struct ram_info ram;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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log_debug("RAM init failed: %d\n", ret);
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return ret;
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}
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ret = ram_get_info(dev, &ram);
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if (ret) {
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log_debug("Cannot get RAM size: %d\n", ret);
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return ret;
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}
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log_debug("RAM init base=%lx, size=%x\n", ram.base, ram.size);
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gd->ram_size = ram.size;
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return 0;
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}
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ulong board_get_usable_ram_top(ulong total_size)
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{
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phys_size_t size;
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phys_addr_t reg;
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struct lmb lmb;
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/* found enough not-reserved memory to relocated U-Boot */
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lmb_init(&lmb);
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lmb_add(&lmb, gd->ram_base, gd->ram_size);
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boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
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/* add 8M for reserved memory for display, fdt, gd,... */
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size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
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reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
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if (!reg)
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reg = gd->ram_top - size;
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/* before relocation, mark the U-Boot memory as cacheable by default */
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if (!(gd->flags & GD_FLG_RELOC))
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mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
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return reg + size;
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}
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