mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 23:02:59 +00:00
eb4f1246f9
The memory map for the RZ/G2L family differs from that of previous R-Car
Gen3/Gen4 SoCs.
A high level memory map can be seen in figure 5.2 (section 5.2.1) of the
RZ/G2L data sheet rev 1.30 published May 12, 2023. A summary is included
here (note that this is a 34-bit address space):
* 0x0_0000_0000 - 0x0_0002_FFFF SRAM area
* 0x0_0003_0000 - 0x0_0FFF_FFFF Reserved area
* 0x0_1000_0000 - 0x0_1FFF_FFFF I/O register area
* 0x0_2000_0000 - 0x0_2FFF_FFFF SPI Multi area
* 0x0_3000_0000 - 0x0_3FFF_FFFF Reserved area
* 0x0_4000_0000 - 0x1_3FFF_FFFF DDR area (4 GiB)
* 0x1_4000_0000 - 0x3_FFFF_FFFF Reserved area
Within the DDR area, the first 128 MiB are reserved by TrustedFirmware.
The region from 0x43F00000 to 0x47DFFFFF inclusive is protected for use
in TrustedFirmware/OP-TEE, but all other memory is included in the
memory map. This reservation is the same as used in R-Car
Gen3/Gen4 and RZ/G2{H,M,N,E} SoCs.
DRAM information is initialised based on the data in the fdt.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
101 lines
4 KiB
Makefile
101 lines
4 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
# (C) Copyright 2000-2006
|
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
|
|
obj-y = cpu_info.o
|
|
obj-y += emac.o
|
|
|
|
obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o
|
|
obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o
|
|
obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o
|
|
obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o
|
|
obj-$(CONFIG_RCAR_64) += lowlevel_init_gen3.o
|
|
obj-$(CONFIG_RCAR_GEN3) += cpu_info-rcar.o memmap-gen3.o
|
|
obj-$(CONFIG_RCAR_GEN4) += cpu_info-rcar.o memmap-gen3.o
|
|
obj-$(CONFIG_RZ_G2) += cpu_info-rzg.o
|
|
obj-$(CONFIG_RZG2L) += cpu_info-rzg2l.o memmap-rzg2l.o
|
|
|
|
ifneq ($(CONFIG_R8A779A0),)
|
|
obj-$(CONFIG_ARMV8_PSCI) += psci-r8a779a0.o
|
|
endif
|
|
|
|
OBJCOPYFLAGS_u-boot-spl.srec := -O srec
|
|
quiet_cmd_objcopy = OBJCOPY $@
|
|
cmd_objcopy = $(OBJCOPY) --gap-fill=0x00 $(OBJCOPYFLAGS) \
|
|
$(OBJCOPYFLAGS_$(@F)) $< $@
|
|
|
|
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
|
|
$(call if_changed,objcopy)
|
|
|
|
srec_cat_gte_160 := ${shell expr `srec_cat -VERSION | grep ^srec_cat | sed 's/^.* //g' | cut -f1-2 -d.` \>= "1.60"}
|
|
ifeq "$(srec_cat_gte_160)" "1"
|
|
srec_cat_le_cmd := "-constant-l-e"
|
|
else
|
|
srec_cat_le_cmd := "-l-e-constant"
|
|
endif
|
|
|
|
ifneq ($(CONFIG_R8A774C0)$(CONFIG_R8A77990)$(CONFIG_R8A77995),)
|
|
#
|
|
# The first 6 generate statements generate the R-Car Gen3 SCIF loader header.
|
|
# The subsequent generate statements represent the following chunk of assembler
|
|
# code, which copies the loaded data from 0xe6304030 to 0xe6318000. This is to
|
|
# work around a limitation of the D3/E3 BootROM, which does not permit loading
|
|
# to 0xe6318000 directly.
|
|
#
|
|
# mov x0, #0xe6000000
|
|
# orr x0, x0, #0x00300000
|
|
# orr x1, x0, #0x00004000
|
|
# orr x1, x1, #0x00000030
|
|
#
|
|
# orr x2, x0, #0x00018000
|
|
# mov x0, x2
|
|
# mov x3, #0x7000
|
|
#1: ldp x4, x5, [x1], #16
|
|
#
|
|
# stp x4, x5, [x2], #16
|
|
# subs x3, x3, #16
|
|
# b.ge 1b
|
|
# br x0
|
|
#
|
|
quiet_cmd_srec_cat = SRECCAT $@
|
|
cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \
|
|
-offset -0x13fd0 \
|
|
-Output_Block_Size 16 \
|
|
-generate 0xe6300400 0xe6300404 $(srec_cat_le_cmd) 0x0 4 \
|
|
-generate 0xe630048c 0xe6300490 $(srec_cat_le_cmd) 0x0 4 \
|
|
-generate 0xe63005d4 0xe63005d8 $(srec_cat_le_cmd) 0xe6304000 4 \
|
|
-generate 0xe63006e4 0xe63006e8 $(srec_cat_le_cmd) $2 4 \
|
|
-generate 0xe6301154 0xe6301158 $(srec_cat_le_cmd) 0xe6304000 4 \
|
|
-generate 0xe6301264 0xe6301268 $(srec_cat_le_cmd) $2 4 \
|
|
-generate 0xe6304000 0xe6304004 $(srec_cat_le_cmd) 0xd2bcc000 4 \
|
|
-generate 0xe6304004 0xe6304008 $(srec_cat_le_cmd) 0xb26c0400 4 \
|
|
-generate 0xe6304008 0xe630400c $(srec_cat_le_cmd) 0xb2720001 4 \
|
|
-generate 0xe630400c 0xe6304010 $(srec_cat_le_cmd) 0xb27c0421 4 \
|
|
-generate 0xe6304010 0xe6304014 $(srec_cat_le_cmd) 0xb2710402 4 \
|
|
-generate 0xe6304014 0xe6304018 $(srec_cat_le_cmd) 0xaa0203e0 4 \
|
|
-generate 0xe6304018 0xe630401c $(srec_cat_le_cmd) 0xd28e0003 4 \
|
|
-generate 0xe630401c 0xe6304020 $(srec_cat_le_cmd) 0xa8c11424 4 \
|
|
-generate 0xe6304020 0xe6304024 $(srec_cat_le_cmd) 0xa8811444 4 \
|
|
-generate 0xe6304024 0xe6304028 $(srec_cat_le_cmd) 0xf1004063 4 \
|
|
-generate 0xe6304028 0xe630402c $(srec_cat_le_cmd) 0x54ffffaa 4 \
|
|
-generate 0xe630402c 0xe6304030 $(srec_cat_le_cmd) 0xd61f0000 4
|
|
else
|
|
quiet_cmd_srec_cat = SRECCAT $@
|
|
cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \
|
|
-Output_Block_Size 16 \
|
|
-generate 0xe6300400 0xe6300404 $(srec_cat_le_cmd) 0x0 4 \
|
|
-generate 0xe630048c 0xe6300490 $(srec_cat_le_cmd) 0x0 4 \
|
|
-generate 0xe63005d4 0xe63005d8 $(srec_cat_le_cmd) $(CONFIG_SPL_TEXT_BASE) 4 \
|
|
-generate 0xe63006e4 0xe63006e8 $(srec_cat_le_cmd) $2 4 \
|
|
-generate 0xe6301154 0xe6301158 $(srec_cat_le_cmd) $(CONFIG_SPL_TEXT_BASE) 4 \
|
|
-generate 0xe6301264 0xe6301268 $(srec_cat_le_cmd) $2 4
|
|
endif
|
|
|
|
spl/u-boot-spl.scif: spl/u-boot-spl.srec spl/u-boot-spl.bin
|
|
$(call cmd,srec_cat,$(shell wc -c spl/u-boot-spl.bin | awk '{printf("0x%08x\n",$$1)}'))
|
|
|
|
# if srec_cat is present build u-boot-spl.scif by default
|
|
has_srec_cat = $(call try-run,srec_cat -VERSion,y,n)
|
|
INPUTS-$(has_srec_cat) += u-boot-spl.scif
|
|
CLEAN_FILES += u-boot-spl.scif
|