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https://github.com/AsahiLinux/u-boot
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6d35682fb6
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes. main_conf is required for phy_gmii_sel. Mark them as 'bootph-all' so they are available in all pre-relocation phases. Fixes the below dts warnings: <stdout>: Warning (reg_format): /bus@f0000/syscon@100000/phy@4044:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) <stdout>: Warning (reg_format): /bus@f0000/ethernet@8000000/ethernet-ports/port@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) <stdout>: Warning (unit_address_vs_reg): /bus@f0000/syscon@100000: node has a unit name, but no reg or ranges property <stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format' <stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' <stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format' <stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #address-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #size-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #address-cells value <stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #size-cells value <stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' <stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size' Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Nishanth Menon <nm@ti.com>
170 lines
1.6 KiB
Text
170 lines
1.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Common AM625 SK dts file for SPLs
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* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "k3-am625-sk-binman.dtsi"
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/ {
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chosen {
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stdout-path = "serial2:115200n8";
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tick-timer = &main_timer0;
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};
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aliases {
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mmc1 = &sdhci1;
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};
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memory@80000000 {
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bootph-all;
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};
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};
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&main_conf {
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bootph-all;
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};
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&cbass_main {
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bootph-all;
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};
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&main_timer0 {
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clock-frequency = <25000000>;
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bootph-all;
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};
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&dmss {
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bootph-all;
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};
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&secure_proxy_main {
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bootph-all;
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};
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&dmsc {
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bootph-all;
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};
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&k3_pds {
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bootph-all;
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};
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&k3_clks {
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bootph-all;
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};
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&k3_reset {
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bootph-all;
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};
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&wkup_conf {
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bootph-all;
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};
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&chipid {
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bootph-all;
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};
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&main_pmx0 {
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bootph-all;
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};
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&main_uart0 {
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bootph-all;
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};
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&main_uart0_pins_default {
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bootph-all;
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};
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&cbass_mcu {
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bootph-all;
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};
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&cbass_wakeup {
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bootph-all;
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};
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&mcu_pmx0 {
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bootph-all;
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};
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&sdhci1 {
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bootph-all;
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};
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&main_mmc1_pins_default {
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bootph-all;
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};
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&fss {
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bootph-all;
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};
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&ospi0_pins_default {
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bootph-all;
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};
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&ospi0 {
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bootph-all;
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flash@0 {
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bootph-all;
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partitions {
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bootph-all;
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partition@3fc0000 {
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bootph-all;
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};
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};
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};
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};
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&inta_main_dmss {
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bootph-all;
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};
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&main_pktdma {
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bootph-all;
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};
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&cpsw3g_mdio {
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bootph-all;
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};
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&cpsw3g_phy0 {
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bootph-all;
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};
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&cpsw3g_phy1 {
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bootph-all;
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};
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&main_rgmii1_pins_default {
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bootph-all;
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};
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&main_rgmii2_pins_default {
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bootph-all;
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};
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&phy_gmii_sel {
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bootph-all;
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};
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&cpsw3g {
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bootph-all;
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ethernet-ports {
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bootph-all;
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};
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};
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&cpsw_port1 {
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bootph-all;
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};
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&cpsw_port2 {
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status = "disabled";
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};
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