Hou Zhiqiang 3b6bf8115f armv8/fsl_lsch2: Add the OCRAM initialization ... Clear the content to zero and the ECC error bit of OCRAM1/2. The OCRAM must be initialized to ZERO by the unit of 8-Byte before accessing it, or else it will generate ECC error. And the IBR has accessed the OCRAM before this initialization, so the ECC error status bit should to be cleared. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>		2017-01-18 09:27:27 -08:00
..
clock.h
config.h	armv8/fsl_lsch2: Add the OCRAM initialization	2017-01-18 09:27:27 -08:00
cpu.h	ARMv8/fsl-layerscape: Correct the OCRAM size	2017-01-18 09:27:22 -08:00
fdt.h	armv8/layerscape: remove unnecessary function declares	2017-01-18 09:24:51 -08:00
fsl_serdes.h	fsl: serdes: ensure accessing the initialized maps of serdes protocol	2016-09-14 14:06:49 -07:00
immap_lsch2.h	armv8: QSPI: Add AHB bus 16MB+ size support	2016-12-05 08:32:43 -08:00
immap_lsch3.h	armv8: ls2080a: Enable PCIe in defconfigs	2017-01-18 09:27:07 -08:00
imx-regs.h
ls2080a_stream_id.h	armv8: ls2080a: update stream ID partitioning info	2016-03-21 12:42:12 -07:00
mmu.h
mp.h	armv8: fsl-layerscape: SMP support for loading 32-bit OS	2016-11-22 11:40:24 -08:00
ns_access.h	fsl: csu: add an API to set R/W permission to PCIe	2016-09-14 14:07:08 -07:00
ppa.h	ARMv8/layerscape: Add FSL PPA support	2016-07-19 11:33:53 -07:00
soc.h	armv8: fsl-layerscape: Add NXP LS2088A SoC support	2016-11-22 11:37:54 -08:00
speed.h