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https://github.com/AsahiLinux/u-boot
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3b52847a45
microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlr1ldMACgkQykllyylKDCHioACghoJw6+NqsZXl8zGWRP38yZ5K mvgAnihfOQq125mpKPZmcc5yt6wVwYIU =8ji9 -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2018.07 microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup |
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| .. | ||
| nand | ||
| onenand | ||
| spi | ||
| ubi | ||
| ubispl | ||
| altera_qspi.c | ||
| cfi_flash.c | ||
| cfi_mtd.c | ||
| ftsmc020.c | ||
| jedec_flash.c | ||
| Kconfig | ||
| Makefile | ||
| mtd-uclass.c | ||
| mtd_uboot.c | ||
| mtdconcat.c | ||
| mtdcore.c | ||
| mtdcore.h | ||
| mtdpart.c | ||
| mw_eeprom.c | ||
| pic32_flash.c | ||
| renesas_rpc_hf.c | ||
| st_smi.c | ||
| stm32_flash.c | ||
| stm32_flash.h | ||