Roy Zang 3b4456ec39 fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080) ... The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-01-14 01:32:22 -06:00
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cpu	fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)	2011-01-14 01:32:22 -06:00
include/asm	powerpc/86xx: Enable common SRIO init code	2011-01-14 01:32:21 -06:00
lib	powerpc: fix register usage in some inline assembly code	2010-12-17 21:18:08 +01:00
config.mk	POWERPC: enable --gc-sections and -ffunction-sections -fdata-sections	2010-11-27 23:35:08 +01:00