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The registers which are managed by the meson-gxl-usb3 PHY driver are actually "USB control" registers (which are "glue" registers which manage OTG detection and routing of the OTG capable port between the DWC2 peripheral-only controller and the DWC3 host-only controller). Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb driver supports the USB control registers on GXL and GXM SoCs (these were previously managed by the meson-gxl-usb3 PHY driver). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> |
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.. | ||
axg.h | ||
boot.h | ||
clock-axg.h | ||
clock-g12a.h | ||
clock-gx.h | ||
eth.h | ||
g12a.h | ||
gpio.h | ||
gx.h | ||
i2c.h | ||
mem.h | ||
meson-vpu.h | ||
sd_emmc.h | ||
sm.h | ||
usb-gx.h | ||
usb.h |