mirror of
https://github.com/AsahiLinux/u-boot
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3a197b2fe4
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
311 lines
10 KiB
C
311 lines
10 KiB
C
/*
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* linux/include/asm-arm/io.h
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*
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* Copyright (C) 1996-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Modifications:
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* 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
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* constant addresses and variable addresses.
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* 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
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* specific IO header files.
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* 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
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* 04-Apr-1999 PJB Added check_signature.
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* 12-Dec-1999 RMK More cleanups
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* 18-Jun-2000 RMK Removed virt_to_* and friends definitions
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*/
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#ifndef __ASM_ARM_IO_H
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#define __ASM_ARM_IO_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#include <asm/memory.h>
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#if 0 /* XXX###XXX */
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#include <asm/arch/hardware.h>
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#endif /* XXX###XXX */
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static inline void sync(void)
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{
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}
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/*
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* Generic virtual read/write. Note that we don't support half-word
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* read/writes. We define __arch_*[bl] here, and leave __arch_*w
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* to the architecture specific code.
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*/
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#define __arch_getb(a) (*(volatile unsigned char *)(a))
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#define __arch_getw(a) (*(volatile unsigned short *)(a))
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#define __arch_getl(a) (*(volatile unsigned int *)(a))
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#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
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#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
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#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
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extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
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extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
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extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
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extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
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extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
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extern void __raw_readsl(unsigned int addr, void *data, int longlen);
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#define __raw_writeb(v,a) __arch_putb(v,a)
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#define __raw_writew(v,a) __arch_putw(v,a)
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#define __raw_writel(v,a) __arch_putl(v,a)
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#define __raw_readb(a) __arch_getb(a)
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#define __raw_readw(a) __arch_getw(a)
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#define __raw_readl(a) __arch_getl(a)
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#define writeb(v,a) __arch_putb(v,a)
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#define writew(v,a) __arch_putw(v,a)
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#define writel(v,a) __arch_putl(v,a)
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#define readb(a) __arch_getb(a)
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#define readw(a) __arch_getw(a)
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#define readl(a) __arch_getl(a)
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/*
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* The compiler seems to be incapable of optimising constants
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* properly. Spell it out to the compiler in some cases.
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* These are only valid for small values of "off" (< 1<<12)
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*/
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#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
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#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
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#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
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#define __raw_base_readb(base,off) __arch_base_getb(base,off)
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#define __raw_base_readw(base,off) __arch_base_getw(base,off)
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#define __raw_base_readl(base,off) __arch_base_getl(base,off)
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/*
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* Now, pick up the machine-defined IO definitions
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*/
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#if 0 /* XXX###XXX */
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#include <asm/arch/io.h>
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#endif /* XXX###XXX */
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/*
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* IO port access primitives
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* -------------------------
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*
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* The ARM doesn't have special IO access instructions; all IO is memory
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* mapped. Note that these are defined to perform little endian accesses
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* only. Their primary purpose is to access PCI and ISA peripherals.
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*
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* Note that for a big endian machine, this implies that the following
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* big endian mode connectivity is in place, as described by numerious
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* ARM documents:
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*
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* PCI: D0-D7 D8-D15 D16-D23 D24-D31
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* ARM: D24-D31 D16-D23 D8-D15 D0-D7
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*
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* The machine specific io.h include defines __io to translate an "IO"
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* address to a memory address.
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*
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* Note that we prevent GCC re-ordering or caching values in expressions
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* by introducing sequence points into the in*() definitions. Note that
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* __raw_* do not guarantee this behaviour.
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*
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* The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
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*/
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#ifdef __io
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#define outb(v,p) __raw_writeb(v,__io(p))
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#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
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#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
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#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
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#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
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#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
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#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
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#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
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#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
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#define insb(p,d,l) __raw_readsb(__io(p),d,l)
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#define insw(p,d,l) __raw_readsw(__io(p),d,l)
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#define insl(p,d,l) __raw_readsl(__io(p),d,l)
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#endif
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#define outb_p(val,port) outb((val),(port))
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#define outw_p(val,port) outw((val),(port))
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#define outl_p(val,port) outl((val),(port))
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#define inb_p(port) inb((port))
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#define inw_p(port) inw((port))
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#define inl_p(port) inl((port))
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#define outsb_p(port,from,len) outsb(port,from,len)
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#define outsw_p(port,from,len) outsw(port,from,len)
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#define outsl_p(port,from,len) outsl(port,from,len)
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#define insb_p(port,to,len) insb(port,to,len)
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#define insw_p(port,to,len) insw(port,to,len)
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#define insl_p(port,to,len) insl(port,to,len)
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/*
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* ioremap and friends.
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*
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* ioremap takes a PCI memory address, as specified in
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* linux/Documentation/IO-mapping.txt. If you want a
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* physical address, use __ioremap instead.
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*/
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extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
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extern void __iounmap(void *addr);
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/*
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* Generic ioremap support.
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*
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* Define:
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* iomem_valid_addr(off,size)
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* iomem_to_phys(off)
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*/
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#ifdef iomem_valid_addr
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#define __arch_ioremap(off,sz,nocache) \
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({ \
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unsigned long _off = (off), _size = (sz); \
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void *_ret = (void *)0; \
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if (iomem_valid_addr(_off, _size)) \
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_ret = __ioremap(iomem_to_phys(_off),_size,0); \
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_ret; \
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})
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#define __arch_iounmap __iounmap
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#endif
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#define ioremap(off,sz) __arch_ioremap((off),(sz),0)
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#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1)
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#define iounmap(_addr) __arch_iounmap(_addr)
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/*
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* DMA-consistent mapping functions. These allocate/free a region of
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* uncached, unwrite-buffered mapped memory space for use with DMA
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* devices. This is the "generic" version. The PCI specific version
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* is in pci.h
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*/
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extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
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extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
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extern void consistent_sync(void *vaddr, size_t size, int rw);
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/*
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* String version of IO memory access ops:
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*/
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extern void _memcpy_fromio(void *, unsigned long, size_t);
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extern void _memcpy_toio(unsigned long, const void *, size_t);
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extern void _memset_io(unsigned long, int, size_t);
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extern void __readwrite_bug(const char *fn);
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/*
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* If this architecture has PCI memory IO, then define the read/write
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* macros. These should only be used with the cookie passed from
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* ioremap.
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*/
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#ifdef __mem_pci
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#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
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#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
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#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
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#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
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#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
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#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
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#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
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#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
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#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
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#define eth_io_copy_and_sum(s,c,l,b) \
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eth_copy_and_sum((s),__mem_pci(c),(l),(b))
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static inline int
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check_signature(unsigned long io_addr, const unsigned char *signature,
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int length)
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{
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int retval = 0;
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do {
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if (readb(io_addr) != *signature)
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goto out;
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io_addr++;
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signature++;
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length--;
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} while (length);
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retval = 1;
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out:
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return retval;
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}
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#elif !defined(readb)
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#define readb(addr) (__readwrite_bug("readb"),0)
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#define readw(addr) (__readwrite_bug("readw"),0)
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#define readl(addr) (__readwrite_bug("readl"),0)
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#define writeb(v,addr) __readwrite_bug("writeb")
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#define writew(v,addr) __readwrite_bug("writew")
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#define writel(v,addr) __readwrite_bug("writel")
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#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
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#define check_signature(io,sig,len) (0)
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#endif /* __mem_pci */
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/*
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* If this architecture has ISA IO, then define the isa_read/isa_write
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* macros.
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*/
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#ifdef __mem_isa
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#define isa_readb(addr) __raw_readb(__mem_isa(addr))
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#define isa_readw(addr) __raw_readw(__mem_isa(addr))
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#define isa_readl(addr) __raw_readl(__mem_isa(addr))
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#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
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#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
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#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
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#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
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#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
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#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
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#define isa_eth_io_copy_and_sum(a,b,c,d) \
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eth_copy_and_sum((a),__mem_isa(b),(c),(d))
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static inline int
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isa_check_signature(unsigned long io_addr, const unsigned char *signature,
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int length)
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{
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int retval = 0;
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do {
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if (isa_readb(io_addr) != *signature)
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goto out;
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io_addr++;
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signature++;
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length--;
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} while (length);
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retval = 1;
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out:
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return retval;
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}
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#else /* __mem_isa */
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#define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
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#define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
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#define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
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#define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
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#define isa_writew(val,addr) __readwrite_bug("isa_writew")
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#define isa_writel(val,addr) __readwrite_bug("isa_writel")
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#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
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#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
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#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
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#define isa_eth_io_copy_and_sum(a,b,c,d) \
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__readwrite_bug("isa_eth_io_copy_and_sum")
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#define isa_check_signature(io,sig,len) (0)
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#endif /* __mem_isa */
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#endif /* __KERNEL__ */
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#endif /* __ASM_ARM_IO_H */
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