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HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per FSL bootlets code. mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved". HW_DRAM_CTL8 is setup as the last element. So skip the initialization of these DRAM_CTL registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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.. | ||
clock.c | ||
iomux.c | ||
Makefile | ||
mxs.c | ||
mxs_init.h | ||
spl_boot.c | ||
spl_lradc_init.c | ||
spl_mem_init.c | ||
spl_power_init.c | ||
start.S | ||
timer.c | ||
u-boot-imx23.bd | ||
u-boot-imx28.bd | ||
u-boot-spl.lds |