u-boot/configs/T4240RDB_defconfig
Tom Rini 1de46d91dd Convert CONFIG_SYS_FSL_NUM_CC_PLLS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_NUM_CC_PLLS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00

104 lines
2.5 KiB
Text

CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xEFF40000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_MPC85xx=y
CONFIG_TARGET_T4240RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_BOOK3E_HV=y
CONFIG_SYS_CACHE_STASHING=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_PCIE3=y
CONFIG_PCIE4=y
CONFIG_VID=y
CONFIG_VID_FLS_ENV="t4240rdb_vdd_mv"
CONFIG_VOL_MONITOR_IR36021_READ=y
CONFIG_VOL_MONITOR_IR36021_SET=y
CONFIG_SYS_FSL_NUM_CC_PLLS=5
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="uImage"
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y
CONFIG_FSL_SATA_V2=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x118000
CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_EMPTY_INFO=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_FLASH_QUIET_TEST=y
CONFIG_SYS_MAX_FLASH_SECT=1024
CONFIG_SYS_MAX_FLASH_BANKS=2
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0xefe00000
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_MAX_CONTROLLER_COUNT=2
CONFIG_USB_STORAGE=y
CONFIG_ADDR_MAP=y
CONFIG_SYS_NUM_ADDR_MAP=64