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https://github.com/AsahiLinux/u-boot
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c05ed00afb
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
381 lines
8.2 KiB
C
381 lines
8.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* (C) Copyright 2002
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*
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* ispVM functions adapted from Lattice's ispmVMEmbedded code:
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* Copyright 2009 Lattice Semiconductor Corp.
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*/
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#include <common.h>
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#include <log.h>
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#include <malloc.h>
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#include <fpga.h>
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#include <lattice.h>
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#include <linux/delay.h>
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static lattice_board_specific_func *pfns;
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static const char *fpga_image;
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static unsigned long read_bytes;
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static unsigned long bufsize;
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static unsigned short expectedCRC;
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/*
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* External variables and functions declared in ivm_core.c module.
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*/
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extern unsigned short g_usCalculatedCRC;
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extern unsigned short g_usDataType;
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extern unsigned char *g_pucIntelBuffer;
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extern unsigned char *g_pucHeapMemory;
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extern unsigned short g_iHeapCounter;
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extern unsigned short g_iHEAPSize;
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extern unsigned short g_usIntelDataIndex;
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extern unsigned short g_usIntelBufferSize;
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extern char *const g_szSupportedVersions[];
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/*
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* ispVMDelay
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*
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* Users must implement a delay to observe a_usTimeDelay, where
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* bit 15 of the a_usTimeDelay defines the unit.
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* 1 = milliseconds
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* 0 = microseconds
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* Example:
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* a_usTimeDelay = 0x0001 = 1 microsecond delay.
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* a_usTimeDelay = 0x8001 = 1 millisecond delay.
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*
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* This subroutine is called upon to provide a delay from 1 millisecond to a few
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* hundreds milliseconds each time.
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* It is understood that due to a_usTimeDelay is defined as unsigned short, a 16
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* bits integer, this function is restricted to produce a delay to 64000
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* micro-seconds or 32000 milli-second maximum. The VME file will never pass on
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* to this function a delay time > those maximum number. If it needs more than
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* those maximum, the VME file will launch the delay function several times to
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* realize a larger delay time cummulatively.
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* It is perfectly alright to provide a longer delay than required. It is not
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* acceptable if the delay is shorter.
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*/
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void ispVMDelay(unsigned short delay)
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{
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if (delay & 0x8000)
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delay = (delay & ~0x8000) * 1000;
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udelay(delay);
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}
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void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
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{
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a_ucValue = a_ucValue ? 1 : 0;
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switch (a_ucPins) {
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case g_ucPinTDI:
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pfns->jtag_set_tdi(a_ucValue);
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break;
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case g_ucPinTCK:
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pfns->jtag_set_tck(a_ucValue);
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break;
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case g_ucPinTMS:
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pfns->jtag_set_tms(a_ucValue);
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break;
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default:
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printf("%s: requested unknown pin\n", __func__);
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}
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}
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unsigned char readPort(void)
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{
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return pfns->jtag_get_tdo();
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}
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void sclock(void)
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{
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writePort(g_ucPinTCK, 0x01);
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writePort(g_ucPinTCK, 0x00);
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}
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void calibration(void)
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{
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/* Apply 2 pulses to TCK. */
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writePort(g_ucPinTCK, 0x00);
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writePort(g_ucPinTCK, 0x01);
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writePort(g_ucPinTCK, 0x00);
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writePort(g_ucPinTCK, 0x01);
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writePort(g_ucPinTCK, 0x00);
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ispVMDelay(0x8001);
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/* Apply 2 pulses to TCK. */
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writePort(g_ucPinTCK, 0x01);
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writePort(g_ucPinTCK, 0x00);
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writePort(g_ucPinTCK, 0x01);
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writePort(g_ucPinTCK, 0x00);
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}
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/*
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* GetByte
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*
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* Returns a byte to the caller. The returned byte depends on the
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* g_usDataType register. If the HEAP_IN bit is set, then the byte
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* is returned from the HEAP. If the LHEAP_IN bit is set, then
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* the byte is returned from the intelligent buffer. Otherwise,
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* the byte is returned directly from the VME file.
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*/
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unsigned char GetByte(void)
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{
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unsigned char ucData;
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unsigned int block_size = 4 * 1024;
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if (g_usDataType & HEAP_IN) {
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/*
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* Get data from repeat buffer.
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*/
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if (g_iHeapCounter > g_iHEAPSize) {
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/*
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* Data over-run.
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*/
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return 0xFF;
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}
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ucData = g_pucHeapMemory[g_iHeapCounter++];
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} else if (g_usDataType & LHEAP_IN) {
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/*
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* Get data from intel buffer.
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*/
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if (g_usIntelDataIndex >= g_usIntelBufferSize) {
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return 0xFF;
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}
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ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
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} else {
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if (read_bytes == bufsize) {
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return 0xFF;
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}
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ucData = *fpga_image++;
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read_bytes++;
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if (!(read_bytes % block_size)) {
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printf("Downloading FPGA %ld/%ld completed\r",
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read_bytes,
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bufsize);
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}
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if (expectedCRC != 0) {
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ispVMCalculateCRC32(ucData);
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}
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}
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return ucData;
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}
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signed char ispVM(void)
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{
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char szFileVersion[9] = { 0 };
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signed char cRetCode = 0;
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signed char cIndex = 0;
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signed char cVersionIndex = 0;
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unsigned char ucReadByte = 0;
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unsigned short crc;
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g_pucHeapMemory = NULL;
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g_iHeapCounter = 0;
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g_iHEAPSize = 0;
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g_usIntelDataIndex = 0;
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g_usIntelBufferSize = 0;
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g_usCalculatedCRC = 0;
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expectedCRC = 0;
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ucReadByte = GetByte();
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switch (ucReadByte) {
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case FILE_CRC:
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crc = (unsigned char)GetByte();
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crc <<= 8;
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crc |= GetByte();
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expectedCRC = crc;
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for (cIndex = 0; cIndex < 8; cIndex++)
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szFileVersion[cIndex] = GetByte();
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break;
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default:
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szFileVersion[0] = (signed char) ucReadByte;
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for (cIndex = 1; cIndex < 8; cIndex++)
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szFileVersion[cIndex] = GetByte();
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break;
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}
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/*
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*
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* Compare the VME file version against the supported version.
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*
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*/
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for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0;
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cVersionIndex++) {
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for (cIndex = 0; cIndex < 8; cIndex++) {
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if (szFileVersion[cIndex] !=
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g_szSupportedVersions[cVersionIndex][cIndex]) {
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cRetCode = VME_VERSION_FAILURE;
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break;
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}
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cRetCode = 0;
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}
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if (cRetCode == 0) {
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break;
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}
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}
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if (cRetCode < 0) {
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return VME_VERSION_FAILURE;
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}
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printf("VME file checked: starting downloading to FPGA\n");
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ispVMStart();
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cRetCode = ispVMCode();
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ispVMEnd();
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ispVMFreeMem();
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puts("\n");
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if (cRetCode == 0 && expectedCRC != 0 &&
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(expectedCRC != g_usCalculatedCRC)) {
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printf("Expected CRC: 0x%.4X\n", expectedCRC);
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printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
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return VME_CRC_FAILURE;
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}
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return cRetCode;
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}
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static int lattice_validate(Lattice_desc *desc, const char *fn)
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{
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int ret_val = false;
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if (desc) {
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if ((desc->family > min_lattice_type) &&
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(desc->family < max_lattice_type)) {
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if ((desc->iface > min_lattice_iface_type) &&
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(desc->iface < max_lattice_iface_type)) {
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if (desc->size) {
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ret_val = true;
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} else {
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printf("%s: NULL part size\n", fn);
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}
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} else {
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printf("%s: Invalid Interface type, %d\n",
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fn, desc->iface);
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}
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} else {
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printf("%s: Invalid family type, %d\n",
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fn, desc->family);
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}
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} else {
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printf("%s: NULL descriptor!\n", fn);
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}
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return ret_val;
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}
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int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize)
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{
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int ret_val = FPGA_FAIL;
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if (!lattice_validate(desc, (char *)__func__)) {
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printf("%s: Invalid device descriptor\n", __func__);
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} else {
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pfns = desc->iface_fns;
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switch (desc->family) {
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case Lattice_XP2:
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fpga_image = buf;
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read_bytes = 0;
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bufsize = bsize;
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debug("%s: Launching the Lattice ISPVME Loader:"
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" addr %p size 0x%lx...\n",
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__func__, fpga_image, bufsize);
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ret_val = ispVM();
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if (ret_val)
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printf("%s: error %d downloading FPGA image\n",
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__func__, ret_val);
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else
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puts("FPGA downloaded successfully\n");
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break;
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default:
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printf("%s: Unsupported family type, %d\n",
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__func__, desc->family);
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}
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}
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return ret_val;
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}
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int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize)
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{
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puts("Dump not supported for Lattice FPGA\n");
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return FPGA_FAIL;
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}
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int lattice_info(Lattice_desc *desc)
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{
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int ret_val = FPGA_FAIL;
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if (lattice_validate(desc, (char *)__func__)) {
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printf("Family: \t");
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switch (desc->family) {
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case Lattice_XP2:
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puts("XP2\n");
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break;
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/* Add new family types here */
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default:
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printf("Unknown family type, %d\n", desc->family);
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}
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puts("Interface type:\t");
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switch (desc->iface) {
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case lattice_jtag_mode:
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puts("JTAG Mode\n");
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break;
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/* Add new interface types here */
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default:
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printf("Unsupported interface type, %d\n", desc->iface);
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}
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printf("Device Size: \t%d bytes\n",
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desc->size);
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if (desc->iface_fns) {
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printf("Device Function Table @ 0x%p\n",
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desc->iface_fns);
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switch (desc->family) {
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case Lattice_XP2:
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break;
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/* Add new family types here */
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default:
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break;
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}
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} else {
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puts("No Device Function Table.\n");
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}
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if (desc->desc)
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printf("Model: \t%s\n", desc->desc);
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ret_val = FPGA_SUCCESS;
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} else {
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printf("%s: Invalid device descriptor\n", __func__);
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}
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return ret_val;
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}
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