mirror of
https://github.com/AsahiLinux/u-boot
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129 lines
2.8 KiB
C
129 lines
2.8 KiB
C
/*
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* (C) Copyright 2002
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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* Keith Outwater, keith_outwater@mvis.com.
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*
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* (C) Copyright 2010
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* Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <spartan3.h>
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#include <command.h>
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#include <asm/io.h>
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#include "fpga.h"
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#include "mvsmr.h"
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Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
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fpga_pre_config_fn,
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fpga_pgm_fn,
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fpga_clk_fn,
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fpga_init_fn,
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fpga_done_fn,
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fpga_wr_fn,
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0
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};
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Xilinx_desc spartan3 = {
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Xilinx_Spartan2,
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slave_serial,
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XILINX_XC3S200_SIZE,
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(void *) &fpga_fns,
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0,
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};
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DECLARE_GLOBAL_DATA_PTR;
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int mvsmr_init_fpga(void)
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{
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fpga_init();
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fpga_add(fpga_xilinx, &spartan3);
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return 1;
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}
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int fpga_init_fn(int cookie)
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{
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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if (in_be32(&gpio->simple_ival) & FPGA_CONFIG)
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return 0;
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return 1;
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}
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int fpga_done_fn(int cookie)
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{
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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int result = 0;
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udelay(10);
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if (in_be32(&gpio->simple_ival) & FPGA_DONE)
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result = 1;
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return result;
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}
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int fpga_pgm_fn(int assert, int flush, int cookie)
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{
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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if (!assert)
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setbits_8(&gpio->sint_dvo, FPGA_STATUS);
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else
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clrbits_8(&gpio->sint_dvo, FPGA_STATUS);
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return assert;
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}
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int fpga_clk_fn(int assert_clk, int flush, int cookie)
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{
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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if (assert_clk)
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setbits_be32(&gpio->simple_dvo, FPGA_CCLK);
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else
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clrbits_be32(&gpio->simple_dvo, FPGA_CCLK);
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return assert_clk;
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}
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int fpga_wr_fn(int assert_write, int flush, int cookie)
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{
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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if (assert_write)
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setbits_be32(&gpio->simple_dvo, FPGA_DIN);
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else
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clrbits_be32(&gpio->simple_dvo, FPGA_DIN);
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return assert_write;
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}
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int fpga_pre_config_fn(int cookie)
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{
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struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
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setbits_8(&gpio->sint_dvo, FPGA_STATUS);
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return 0;
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}
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