Sean Anderson 38ef64e6ce spl: nand: Set bl_len to page size ... Since commit 34793598c8 ("mtd: nand: mxs_nand_spl: Remove the page aligned access") there are no longer any users of nand_get_mtd. However, it is still important to know what the page size is so we can allocate a large-enough buffer. If the image size is not page-aligned, we will go off the end of the buffer and clobber some memory. Introduce a new function nand_page_size which returns the page size. For most drivers it is easy to determine the page size. However, a few need to be modified since they only keep the page size around temporarily. It's possible that this patch could cause a regression on some platforms if the offset is non-aligned and there is invalid address space immediately before the load address. spl_load_legacy_img does not (except when compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or SPL_LOAD_IMX_CONTAINER (none in tree) would be affected. defconfig CONFIG_TEXT_BASE ======================= ================ am335x_evm 0x80800000 am43xx_evm 0x80800000 am43xx_evm_rtconly 0x80800000 am43xx_evm_usbhost_boot 0x80800000 am43xx_hs_evm 0x80800000 dra7xx_evm 0x80800000 gwventana_nand 0x17800000 imx8mn_bsh_smm_s2 0x40200000 All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a little underflow. Signed-off-by: Sean Anderson <seanga2@gmail.com>		2023-11-16 12:43:48 -05:00
..
raw	spl: nand: Set bl_len to page size	2023-11-16 12:43:48 -05:00
spi	mtd: spinand: winbond: add Winbond W25N02KV flash support	2023-10-13 10:49:07 +02:00
bbt.c	common: Drop linux/printk.h from common header	2023-09-24 09:54:57 -04:00
core.c	common: Drop linux/printk.h from common header	2023-09-24 09:54:57 -04:00
Kconfig	mtd: nand: Add core infrastructure to support SPI NANDs	2018-09-20 20:10:49 +05:30
Makefile	mtd: Makefile: deep cleanup	2019-12-04 17:10:51 -05:00