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4992d8360d
Unlike in Linux, -supply is not automatically appended to regulator
requests. Add it.
Fixes: 2645bc0e12
("arm: layerscape: Add sfp driver")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
350 lines
7.9 KiB
C
350 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
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*
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* This driver supports the Security Fuse Processor device found on some
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* Layerscape processors. At the moment, we only support a few processors.
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* This driver was written with reference to the Layerscape SDK User
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* Guide [1] and the ATF SFP driver [2].
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*
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* [1] https://docs.nxp.com/bundle/GUID-487B2E69-BB19-42CB-AC38-7EF18C0FE3AE/page/GUID-27FC40AD-3321-4A82-B29E-7BB49EE94F23.html
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* [2] https://source.codeaurora.org/external/qoriq/qoriq-components/atf/tree/drivers/nxp/sfp?h=github.com/master
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*/
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#define LOG_CATEGORY UCLASS_MISC
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#include <common.h>
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#include <clk.h>
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#include <fuse.h>
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#include <misc.h>
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#include <asm/io.h>
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#include <dm/device_compat.h>
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#include <dm/read.h>
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#include <linux/bitfield.h>
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#include <power/regulator.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define SFP_INGR 0x20
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#define SFP_SVHESR 0x24
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#define SFP_SFPCR 0x28
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#define SFP_START 0x200
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#define SFP_END 0x284
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#define SFP_SIZE (SFP_END - SFP_START + 4)
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#define SFP_INGR_ERR BIT(8)
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#define SFP_INGR_INST GENMASK(7, 0)
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#define SFP_INGR_READFB 0x01
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#define SFP_INGR_PROGFB 0x02
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#define SFP_SFPCR_PPW GENMASK(15, 0)
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enum ls2_sfp_ioctl {
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LS2_SFP_IOCTL_READ,
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LS2_SFP_IOCTL_PROG,
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};
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/**
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* struct ls2_sfp_priv - private data for LS2 SFP
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* @base: Base address of SFP
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* @supply: The (optional) supply for TA_PROG_SFP
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* @programmed: Whether we've already programmed the fuses since the last
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* reset. The SFP has a *very* limited amount of programming
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* cycles (two to six, depending on the model), so we try and
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* prevent accidentally performing additional programming
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* cycles.
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* @dirty: Whether the mirror registers have been written to (overridden)
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* since we've last read the fuses (either as part of the reset
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* process or using a READFB instruction). There is a much larger,
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* but still finite, limit on the number of SFP read cycles (around
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* 300,000), so we try and minimize reads as well.
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*/
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struct ls2_sfp_priv {
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void __iomem *base;
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struct udevice *supply;
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bool programmed, dirty;
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};
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static u32 ls2_sfp_readl(struct ls2_sfp_priv *priv, ulong off)
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{
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u32 val = be32_to_cpu(readl(priv->base + off));
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log_debug("%08x = readl(%p)\n", val, priv->base + off);
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return val;
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}
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static void ls2_sfp_writel(struct ls2_sfp_priv *priv, ulong val, ulong off)
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{
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log_debug("writel(%08lx, %p)\n", val, priv->base + off);
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writel(cpu_to_be32(val), priv->base + off);
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}
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static bool ls2_sfp_validate(struct udevice *dev, int offset, int size)
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{
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if (offset < 0 || size < 0) {
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dev_notice(dev, "size and offset must be positive\n");
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return false;
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}
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if (offset & 3 || size & 3) {
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dev_notice(dev, "size and offset must be multiples of 4\n");
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return false;
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}
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if (offset + size > SFP_SIZE) {
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dev_notice(dev, "size + offset must be <= %#x\n", SFP_SIZE);
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return false;
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}
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return true;
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}
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static int ls2_sfp_read(struct udevice *dev, int offset, void *buf_bytes,
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int size)
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{
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int i;
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struct ls2_sfp_priv *priv = dev_get_priv(dev);
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u32 *buf = buf_bytes;
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if (!ls2_sfp_validate(dev, offset, size))
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return -EINVAL;
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for (i = 0; i < size; i += 4)
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buf[i >> 2] = ls2_sfp_readl(priv, SFP_START + offset + i);
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return size;
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}
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static int ls2_sfp_write(struct udevice *dev, int offset,
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const void *buf_bytes, int size)
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{
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int i;
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struct ls2_sfp_priv *priv = dev_get_priv(dev);
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const u32 *buf = buf_bytes;
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if (!ls2_sfp_validate(dev, offset, size))
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return -EINVAL;
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for (i = 0; i < size; i += 4)
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ls2_sfp_writel(priv, buf[i >> 2], SFP_START + offset + i);
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priv->dirty = true;
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return size;
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}
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static int ls2_sfp_check_secret(struct udevice *dev)
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{
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struct ls2_sfp_priv *priv = dev_get_priv(dev);
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u32 svhesr = ls2_sfp_readl(priv, SFP_SVHESR);
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if (svhesr) {
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dev_warn(dev, "secret value hamming error not zero: %08x\n",
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svhesr);
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return -EIO;
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}
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return 0;
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}
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static int ls2_sfp_transaction(struct ls2_sfp_priv *priv, ulong inst)
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{
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u32 ingr;
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ls2_sfp_writel(priv, inst, SFP_INGR);
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do {
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ingr = ls2_sfp_readl(priv, SFP_INGR);
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} while (FIELD_GET(SFP_INGR_INST, ingr));
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return FIELD_GET(SFP_INGR_ERR, ingr) ? -EIO : 0;
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}
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static int ls2_sfp_ioctl(struct udevice *dev, unsigned long request, void *buf)
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{
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int ret;
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struct ls2_sfp_priv *priv = dev_get_priv(dev);
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switch (request) {
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case LS2_SFP_IOCTL_READ:
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if (!priv->dirty) {
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dev_dbg(dev, "ignoring read request, since fuses are not dirty\n");
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return 0;
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}
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ret = ls2_sfp_transaction(priv, SFP_INGR_READFB);
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if (ret) {
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dev_err(dev, "error reading fuses\n");
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return ret;
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}
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ls2_sfp_check_secret(dev);
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priv->dirty = false;
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return 0;
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case LS2_SFP_IOCTL_PROG:
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if (priv->programmed) {
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dev_warn(dev, "fuses already programmed\n");
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return -EPERM;
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}
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ret = ls2_sfp_check_secret(dev);
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if (ret)
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return ret;
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if (priv->supply) {
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ret = regulator_set_enable(priv->supply, true);
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if (ret)
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return ret;
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}
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ret = ls2_sfp_transaction(priv, SFP_INGR_PROGFB);
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priv->programmed = true;
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if (priv->supply)
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regulator_set_enable(priv->supply, false);
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if (ret)
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dev_err(dev, "error programming fuses\n");
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return ret;
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default:
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dev_dbg(dev, "unknown ioctl %lu\n", request);
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return -EINVAL;
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}
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}
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static const struct misc_ops ls2_sfp_ops = {
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.read = ls2_sfp_read,
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.write = ls2_sfp_write,
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.ioctl = ls2_sfp_ioctl,
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};
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static int ls2_sfp_probe(struct udevice *dev)
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{
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int ret;
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struct clk clk;
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struct ls2_sfp_priv *priv = dev_get_priv(dev);
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ulong rate;
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priv->base = dev_read_addr_ptr(dev);
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if (!priv->base) {
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dev_dbg(dev, "could not read register base\n");
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return -EINVAL;
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}
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ret = device_get_supply_regulator(dev, "ta-sfp-prog-supply", &priv->supply);
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if (ret && ret != -ENODEV && ret != -ENOSYS) {
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dev_dbg(dev, "problem getting supply (err %d)\n", ret);
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return ret;
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}
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ret = clk_get_by_name(dev, "sfp", &clk);
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if (ret == -ENOSYS) {
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rate = gd->bus_clk / 4;
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} else if (ret) {
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dev_dbg(dev, "could not get clock (err %d)\n", ret);
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return ret;
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} else {
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ret = clk_enable(&clk);
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if (ret) {
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dev_dbg(dev, "could not enable clock (err %d)\n", ret);
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return ret;
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}
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rate = clk_get_rate(&clk);
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clk_free(&clk);
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if (!rate || IS_ERR_VALUE(rate)) {
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ret = rate ? rate : -ENOENT;
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dev_dbg(dev, "could not get clock rate (err %d)\n",
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ret);
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return ret;
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}
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}
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/* sfp clock in MHz * 12 */
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ls2_sfp_writel(priv, FIELD_PREP(SFP_SFPCR_PPW, rate * 12 / 1000000),
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SFP_SFPCR);
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ls2_sfp_check_secret(dev);
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return 0;
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}
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static const struct udevice_id ls2_sfp_ids[] = {
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{ .compatible = "fsl,ls1021a-sfp" },
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{ }
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};
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U_BOOT_DRIVER(ls2_sfp) = {
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.name = "ls2_sfp",
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.id = UCLASS_MISC,
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.of_match = ls2_sfp_ids,
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.probe = ls2_sfp_probe,
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.ops = &ls2_sfp_ops,
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.priv_auto = sizeof(struct ls2_sfp_priv),
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};
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static int ls2_sfp_device(struct udevice **dev)
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{
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int ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_DRIVER_GET(ls2_sfp), dev);
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if (ret)
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log_debug("device not found (err %d)\n", ret);
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return ret;
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}
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int fuse_read(u32 bank, u32 word, u32 *val)
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{
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int ret;
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struct udevice *dev;
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ret = ls2_sfp_device(&dev);
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if (ret)
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return ret;
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ret = misc_ioctl(dev, LS2_SFP_IOCTL_READ, NULL);
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if (ret)
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return ret;
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ret = misc_read(dev, word << 2, val, sizeof(*val));
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return ret < 0 ? ret : 0;
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}
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int fuse_sense(u32 bank, u32 word, u32 *val)
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{
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int ret;
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struct udevice *dev;
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ret = ls2_sfp_device(&dev);
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if (ret)
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return ret;
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ret = misc_read(dev, word << 2, val, sizeof(*val));
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return ret < 0 ? ret : 0;
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}
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int fuse_prog(u32 bank, u32 word, u32 val)
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{
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int ret;
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struct udevice *dev;
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ret = ls2_sfp_device(&dev);
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if (ret)
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return ret;
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ret = misc_write(dev, word << 2, &val, sizeof(val));
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if (ret < 0)
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return ret;
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return misc_ioctl(dev, LS2_SFP_IOCTL_PROG, NULL);
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}
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int fuse_override(u32 bank, u32 word, u32 val)
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{
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int ret;
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struct udevice *dev;
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ret = ls2_sfp_device(&dev);
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if (ret)
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return ret;
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ret = misc_write(dev, word << 2, &val, sizeof(val));
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return ret < 0 ? ret : 0;
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}
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