mirror of
https://github.com/AsahiLinux/u-boot
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c4bd12a7da
For !DM case busses are listed as ZynqMP> i2c bus Bus 0: zynq_0 Bus 1: zynq_0->PCA9544A@0x75:0 Bus 2: zynq_0->PCA9544A@0x75:1 Bus 3: zynq_0->PCA9544A@0x75:2 Bus 4: zynq_1 Bus 5: zynq_1->PCA9548@0x74:0 Bus 6: zynq_1->PCA9548@0x74:1 Bus 7: zynq_1->PCA9548@0x74:2 Bus 8: zynq_1->PCA9548@0x74:3 Bus 9: zynq_1->PCA9548@0x74:4 Bus 10: zynq_1->PCA9548@0x75:0 Bus 11: zynq_1->PCA9548@0x75:1 Bus 12: zynq_1->PCA9548@0x75:2 Bus 13: zynq_1->PCA9548@0x75:3 Bus 14: zynq_1->PCA9548@0x75:4 Bus 15: zynq_1->PCA9548@0x75:5 Bus 16: zynq_1->PCA9548@0x75:6 Bus 17: zynq_1->PCA9548@0x75:7 where is exactly describing i2c bus topology. By moving to DM case i2c mux buses are using names from DT and because i2c-muxes describing sub busses with the same names like i2c@0, etc it is hard to identify which bus is where. Linux is adding topology information to i2c-mux busses to identify them better. This patch is doing the same and composing bus name with topology information. When patch is applied with topology information on zcu102-revA. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@ff020000->i2c-mux@75->i2c@0 Bus 3: i2c@ff020000->i2c-mux@75->i2c@1 Bus 4: i2c@ff020000->i2c-mux@75->i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@ff030000->i2c-mux@74->i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@ff030000->i2c-mux@74->i2c@1 Bus 7: i2c@ff030000->i2c-mux@74->i2c@2 Bus 8: i2c@ff030000->i2c-mux@74->i2c@3 Bus 9: i2c@ff030000->i2c-mux@74->i2c@4 Bus 10: i2c@ff030000->i2c-mux@75->i2c@0 Bus 11: i2c@ff030000->i2c-mux@75->i2c@1 Bus 12: i2c@ff030000->i2c-mux@75->i2c@2 Bus 13: i2c@ff030000->i2c-mux@75->i2c@3 Bus 14: i2c@ff030000->i2c-mux@75->i2c@4 Bus 15: i2c@ff030000->i2c-mux@75->i2c@5 Bus 16: i2c@ff030000->i2c-mux@75->i2c@6 Bus 17: i2c@ff030000->i2c-mux@75->i2c@7 Behavior before the patch is applied. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@0 Bus 3: i2c@1 Bus 4: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@1 Bus 7: i2c@2 Bus 8: i2c@3 Bus 9: i2c@4 Bus 10: i2c@0 Bus 11: i2c@1 Bus 12: i2c@2 Bus 13: i2c@3 Bus 14: i2c@4 Bus 15: i2c@5 Bus 16: i2c@6 Bus 17: i2c@7 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
224 lines
5.3 KiB
C
224 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <dm/lists.h>
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#include <dm/root.h>
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/**
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* struct i2c_mux: Information the uclass stores about an I2C mux
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*
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* @selected: Currently selected mux, or -1 for none
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* @i2c_bus: I2C bus to use for communcation
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*/
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struct i2c_mux {
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int selected;
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struct udevice *i2c_bus;
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};
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/**
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* struct i2c_mux_bus: Information about each bus the mux controls
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*
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* @channel: Channel number used to select this bus
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*/
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struct i2c_mux_bus {
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uint channel;
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};
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/* Find out the mux channel number */
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static int i2c_mux_child_post_bind(struct udevice *dev)
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{
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struct i2c_mux_bus *plat = dev_get_parent_platdata(dev);
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int channel;
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channel = dev_read_u32_default(dev, "reg", -1);
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if (channel < 0)
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return -EINVAL;
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plat->channel = channel;
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return 0;
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}
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/* Find the I2C buses selected by this mux */
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static int i2c_mux_post_bind(struct udevice *mux)
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{
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ofnode node;
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int ret;
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debug("%s: %s\n", __func__, mux->name);
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/*
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* There is no compatible string in the sub-nodes, so we must manually
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* bind these
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*/
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dev_for_each_subnode(node, mux) {
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struct udevice *dev;
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const char *name;
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const char *arrow = "->";
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char *full_name;
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int parent_name_len, arrow_len, mux_name_len, name_len;
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name = ofnode_get_name(node);
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/* Calculate lenghts of strings */
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parent_name_len = strlen(mux->parent->name);
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arrow_len = strlen(arrow);
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mux_name_len = strlen(mux->name);
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name_len = strlen(name);
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full_name = calloc(1, parent_name_len + arrow_len +
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mux_name_len + arrow_len + name_len + 1);
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if (!full_name)
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return -ENOMEM;
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/* Compose bus name */
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strcat(full_name, mux->parent->name);
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strcat(full_name, arrow);
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strcat(full_name, mux->name);
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strcat(full_name, arrow);
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strcat(full_name, name);
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ret = device_bind_driver_to_node(mux, "i2c_mux_bus_drv",
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full_name, node, &dev);
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debug(" - bind ret=%d, %s, req_seq %d\n", ret,
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dev ? dev->name : NULL, dev->req_seq);
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if (ret)
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return ret;
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}
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return 0;
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}
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/* Set up the mux ready for use */
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static int i2c_mux_post_probe(struct udevice *mux)
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{
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struct i2c_mux *priv = dev_get_uclass_priv(mux);
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int ret;
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debug("%s: %s\n", __func__, mux->name);
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priv->selected = -1;
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/* if parent is of i2c uclass already, we'll take that, otherwise
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* look if we find an i2c-parent phandle
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*/
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if (UCLASS_I2C == device_get_uclass_id(mux->parent)) {
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priv->i2c_bus = dev_get_parent(mux);
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debug("%s: bus=%p/%s\n", __func__, priv->i2c_bus,
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priv->i2c_bus->name);
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return 0;
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}
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ret = uclass_get_device_by_phandle(UCLASS_I2C, mux, "i2c-parent",
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&priv->i2c_bus);
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if (ret)
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return ret;
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debug("%s: bus=%p/%s\n", __func__, priv->i2c_bus, priv->i2c_bus->name);
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return 0;
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}
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int i2c_mux_select(struct udevice *dev)
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{
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struct i2c_mux_bus *plat = dev_get_parent_platdata(dev);
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struct udevice *mux = dev->parent;
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struct i2c_mux_ops *ops = i2c_mux_get_ops(mux);
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if (!ops->select)
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return -ENOSYS;
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return ops->select(mux, dev, plat->channel);
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}
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int i2c_mux_deselect(struct udevice *dev)
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{
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struct i2c_mux_bus *plat = dev_get_parent_platdata(dev);
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struct udevice *mux = dev->parent;
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struct i2c_mux_ops *ops = i2c_mux_get_ops(mux);
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if (!ops->deselect)
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return -ENOSYS;
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return ops->deselect(mux, dev, plat->channel);
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}
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static int i2c_mux_bus_set_bus_speed(struct udevice *dev, unsigned int speed)
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{
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struct udevice *mux = dev->parent;
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struct i2c_mux *priv = dev_get_uclass_priv(mux);
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int ret, ret2;
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ret = i2c_mux_select(dev);
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if (ret)
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return ret;
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ret = dm_i2c_set_bus_speed(priv->i2c_bus, speed);
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ret2 = i2c_mux_deselect(dev);
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return ret ? ret : ret2;
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}
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static int i2c_mux_bus_probe(struct udevice *dev, uint chip_addr,
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uint chip_flags)
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{
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struct udevice *mux = dev->parent;
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struct i2c_mux *priv = dev_get_uclass_priv(mux);
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struct dm_i2c_ops *ops = i2c_get_ops(priv->i2c_bus);
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int ret, ret2;
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debug("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name);
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if (!ops->probe_chip)
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return -ENOSYS;
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ret = i2c_mux_select(dev);
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if (ret)
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return ret;
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ret = ops->probe_chip(priv->i2c_bus, chip_addr, chip_flags);
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ret2 = i2c_mux_deselect(dev);
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return ret ? ret : ret2;
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}
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static int i2c_mux_bus_xfer(struct udevice *dev, struct i2c_msg *msg,
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int nmsgs)
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{
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struct udevice *mux = dev->parent;
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struct i2c_mux *priv = dev_get_uclass_priv(mux);
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struct dm_i2c_ops *ops = i2c_get_ops(priv->i2c_bus);
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int ret, ret2;
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debug("%s: %s, bus %s\n", __func__, dev->name, priv->i2c_bus->name);
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if (!ops->xfer)
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return -ENOSYS;
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ret = i2c_mux_select(dev);
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if (ret)
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return ret;
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ret = ops->xfer(priv->i2c_bus, msg, nmsgs);
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ret2 = i2c_mux_deselect(dev);
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return ret ? ret : ret2;
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}
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static const struct dm_i2c_ops i2c_mux_bus_ops = {
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.xfer = i2c_mux_bus_xfer,
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.probe_chip = i2c_mux_bus_probe,
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.set_bus_speed = i2c_mux_bus_set_bus_speed,
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};
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U_BOOT_DRIVER(i2c_mux_bus) = {
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.name = "i2c_mux_bus_drv",
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.id = UCLASS_I2C,
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.ops = &i2c_mux_bus_ops,
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};
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UCLASS_DRIVER(i2c_mux) = {
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.id = UCLASS_I2C_MUX,
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.name = "i2c_mux",
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.post_bind = i2c_mux_post_bind,
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.post_probe = i2c_mux_post_probe,
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.per_device_auto_alloc_size = sizeof(struct i2c_mux),
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.per_child_platdata_auto_alloc_size = sizeof(struct i2c_mux_bus),
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.child_post_bind = i2c_mux_child_post_bind,
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};
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