mirror of
https://github.com/AsahiLinux/u-boot
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089df18bfe
Commit 94e3c8c4fd ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it. Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool. In many cases we can select
these because they are required to implement other drivers. We also
correct how we include the various hashing algorithms in SPL.
This commit was generated as follows (after Kconfig additions):
[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL
Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
211 lines
5.3 KiB
C
211 lines
5.3 KiB
C
/*
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* Copyright (C) 2016 Amarula Solutions B.V.
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* Copyright (C) 2016 Engicam S.r.l.
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*
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* Configuration settings for the Engicam i.CoreM6 QDL Starter Kits.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __IMX6QLD_ICORE_CONFIG_H
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#define __IMX6QLD_ICORE_CONFIG_H
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#include <linux/sizes.h>
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#include "mx6_common.h"
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
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/* Total Size of Environment Sector */
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#define CONFIG_ENV_SIZE SZ_128K
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* Environment */
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#ifndef CONFIG_ENV_IS_NOWHERE
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/* Environment in MMC */
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# if defined(CONFIG_ENV_IS_IN_MMC)
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# define CONFIG_ENV_OFFSET 0x100000
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/* Environment in NAND */
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# elif defined(CONFIG_ENV_IS_IN_NAND)
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# define CONFIG_ENV_OFFSET 0x400000
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# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
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# endif
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#endif
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/* Default environment */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"splashpos=m,m\0" \
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"image=uImage\0" \
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"fit_image=fit.itb\0" \
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"console=ttymxc3\0" \
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"fdt_high=0xffffffff\0" \
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"fdt_addr=0x18000000\0" \
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"boot_fdt=try\0" \
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"mmcpart=1\0" \
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"nandroot=ubi0:rootfs rootfstype=ubifs\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"ubiargs=setenv bootargs console=${console},${baudrate} " \
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"ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
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"fitboot=echo Booting FIT image from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"_mmcboot=run mmcargs; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootm; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootm; " \
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"fi\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadfit; then " \
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"run fitboot; " \
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"else " \
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"if run loadimage; then " \
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"run _mmcboot; " \
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"fi; " \
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"fi; " \
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"fi; " \
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"fi\0" \
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"nandboot=echo Booting from nand ...; " \
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"if mtdparts; then " \
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"echo Starting nand boot ...; " \
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"else " \
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"mtdparts default; " \
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"fi; " \
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"run ubiargs; " \
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"nand read ${loadaddr} kernel 0x800000; " \
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"nand read ${fdt_addr} dtb 0x100000; " \
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"bootm ${loadaddr} - ${fdt_addr}\0"
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#define CONFIG_BOOTCOMMAND "run $modeboot"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_SP_OFFSET)
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/* FIT */
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#ifdef CONFIG_FIT
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# define CONFIG_HASH_VERIFY
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# define CONFIG_IMAGE_FORMAT_LEGACY
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#endif
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/* UART */
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#ifdef CONFIG_MXC_UART
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# define CONFIG_MXC_UART_BASE UART4_BASE
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#endif
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/* MMC */
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#ifdef CONFIG_FSL_USDHC
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# define CONFIG_SYS_MMC_ENV_DEV 0
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# define CONFIG_SYS_FSL_USDHC_NUM 1
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# define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#endif
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/* NAND */
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#ifdef CONFIG_NAND_MXS
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# define CONFIG_SYS_MAX_NAND_DEVICE 1
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# define CONFIG_SYS_NAND_BASE 0x40000000
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# define CONFIG_SYS_NAND_5_ADDR_CYCLE
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# define CONFIG_SYS_NAND_ONFI_DETECTION
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# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
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/* MTD device */
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# define CONFIG_MTD_DEVICE
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# define CONFIG_CMD_MTDPARTS
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# define CONFIG_MTD_PARTITIONS
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# define MTDIDS_DEFAULT "nand0=gpmi-nand"
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# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
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"1m(env),8m(kernel),1m(dtb),-(rootfs)"
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/* UBI */
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# define CONFIG_CMD_UBIFS
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# define CONFIG_RBTREE
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# define CONFIG_LZO
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# define CONFIG_APBH_DMA
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# define CONFIG_APBH_DMA_BURST
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# define CONFIG_APBH_DMA_BURST8
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#endif
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/* Ethernet */
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#ifdef CONFIG_FEC_MXC
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# define IMX_FEC_BASE ENET_BASE_ADDR
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# define CONFIG_FEC_MXC_PHYADDR 0
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# define CONFIG_FEC_XCV_TYPE RMII
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# define CONFIG_ETHPRIME "FEC"
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# define CONFIG_MII
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# define CONFIG_PHYLIB
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# define CONFIG_PHY_SMSC
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#endif
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/* Framebuffer */
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#ifdef CONFIG_VIDEO_IPUV3
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# define CONFIG_IPUV3_CLK 260000000
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# define CONFIG_IMX_VIDEO_SKIP
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# define CONFIG_SPLASH_SCREEN
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# define CONFIG_SPLASH_SCREEN_ALIGN
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# define CONFIG_BMP_16BPP
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# define CONFIG_VIDEO_BMP_RLE8
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# define CONFIG_VIDEO_LOGO
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# define CONFIG_VIDEO_BMP_LOGO
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#endif
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/* SPL */
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#ifdef CONFIG_SPL
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# ifdef CONFIG_NAND_MXS
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# define CONFIG_SPL_NAND_SUPPORT
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# else
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# define CONFIG_SPL_MMC_SUPPORT
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# endif
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# include "imx6_spl.h"
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# ifdef CONFIG_SPL_BUILD
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# undef CONFIG_DM_GPIO
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# undef CONFIG_DM_MMC
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# endif
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#endif
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#endif /* __IMX6QLD_ICORE_CONFIG_H */
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