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de0095b400
Default synchronous exceptions handler prints only esr and register dump. Sometimes it requiers to see an address which caused exceptions to understand what's going on ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or 0x35. Same applies for EL1. This patch adds function whivh determine current EL, gets correct FAR register and prints it on panic. Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
247 lines
5 KiB
C
247 lines
5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2013
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* David Feng <fenghua@phytium.com.cn>
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*/
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#include <common.h>
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#include <asm/esr.h>
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#include <asm/global_data.h>
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#include <asm/ptrace.h>
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#include <irq_func.h>
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#include <linux/compiler.h>
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#include <efi_loader.h>
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#include <semihosting.h>
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DECLARE_GLOBAL_DATA_PTR;
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int interrupt_init(void)
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{
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enable_interrupts();
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return 0;
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}
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void enable_interrupts(void)
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{
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return;
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}
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int disable_interrupts(void)
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{
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return 0;
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}
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static void show_efi_loaded_images(struct pt_regs *regs)
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{
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efi_print_image_infos((void *)regs->elr);
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}
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static void dump_far(unsigned long esr)
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{
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unsigned long el, far;
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switch ((esr >> 26) & 0b111111) {
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case 0x20:
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case 0x21:
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case 0x24:
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case 0x25:
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case 0x22:
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case 0x34:
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case 0x35:
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break;
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default:
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return;
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}
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asm("mrs %0, CurrentEl": "=r" (el));
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switch (el >> 2) {
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case 1:
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asm("mrs %0, FAR_EL1": "=r" (far));
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break;
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case 2:
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asm("mrs %0, FAR_EL2": "=r" (far));
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break;
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default:
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/* don't print anything to make output pretty */
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return;
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}
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printf(", far 0x%lx", far);
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}
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static void dump_instr(struct pt_regs *regs)
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{
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u32 *addr = (u32 *)(regs->elr & ~3UL);
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int i;
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printf("Code: ");
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for (i = -4; i < 1; i++)
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printf(i == 0 ? "(%08x) " : "%08x ", addr[i]);
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printf("\n");
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}
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void show_regs(struct pt_regs *regs)
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{
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int i;
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if (gd->flags & GD_FLG_RELOC)
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printf("elr: %016lx lr : %016lx (reloc)\n",
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regs->elr - gd->reloc_off,
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regs->regs[30] - gd->reloc_off);
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printf("elr: %016lx lr : %016lx\n", regs->elr, regs->regs[30]);
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for (i = 0; i < 29; i += 2)
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printf("x%-2d: %016lx x%-2d: %016lx\n",
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i, regs->regs[i], i+1, regs->regs[i+1]);
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printf("\n");
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dump_instr(regs);
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}
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/*
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* Try to "emulate" a semihosting call in the event that we don't have a
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* debugger attached.
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*/
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static bool smh_emulate_trap(struct pt_regs *regs)
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{
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int size;
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if (ESR_ELx_EC(regs->esr) != ESR_ELx_EC_UNKNOWN)
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return false;
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if (regs->spsr & PSR_MODE32_BIT) {
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if (regs->spsr & PSR_AA32_T_BIT) {
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u16 *insn = (u16 *)ALIGN_DOWN(regs->elr, 2);
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if (*insn != SMH_T32_SVC && *insn != SMH_T32_HLT)
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return false;
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size = 2;
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} else {
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u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4);
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if (*insn != SMH_A32_SVC && *insn != SMH_A32_HLT)
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return false;
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size = 4;
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}
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} else {
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u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4);
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if (*insn != SMH_A64_HLT)
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return false;
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size = 4;
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}
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/* Avoid future semihosting calls */
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disable_semihosting();
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/* Just pretend the call failed */
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regs->regs[0] = -1;
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regs->elr += size;
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return true;
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}
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/*
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* do_bad_sync handles the impossible case in the Synchronous Abort vector.
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*/
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void do_bad_sync(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08lx\n",
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pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_bad_irq handles the impossible case in the Irq vector.
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*/
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void do_bad_irq(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("Bad mode in \"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_bad_fiq handles the impossible case in the Fiq vector.
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*/
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void do_bad_fiq(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("Bad mode in \"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_bad_error handles the impossible case in the Error vector.
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*/
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void do_bad_error(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("Bad mode in \"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_sync handles the Synchronous Abort exception.
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*/
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void do_sync(struct pt_regs *pt_regs)
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{
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if (CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) &&
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smh_emulate_trap(pt_regs))
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return;
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efi_restore_gd();
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printf("\"Synchronous Abort\" handler, esr 0x%08lx", pt_regs->esr);
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dump_far(pt_regs->esr);
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printf("\n");
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_irq handles the Irq exception.
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*/
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void do_irq(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("\"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_fiq handles the Fiq exception.
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*/
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void do_fiq(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("\"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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/*
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* do_error handles the Error exception.
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* Errors are more likely to be processor specific,
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* it is defined with weak attribute and can be redefined
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* in processor specific code.
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*/
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void __weak do_error(struct pt_regs *pt_regs)
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{
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efi_restore_gd();
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printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
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show_regs(pt_regs);
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show_efi_loaded_images(pt_regs);
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panic("Resetting CPU ...\n");
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}
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