mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 13:56:30 +00:00
37ea1343ac
Currently, it isn't possible to build clock drivers for more than one platform due to how the msm_enable() and msm_set_rate() callbacks are implemented. Extend qcom_clk_data to include function pointers for these and convert all platforms to use them. Previously, clock drivers relied on include/configs/<board.h> to include the board specific sysmap header, however as most of the header contents are clock driver related, import the contents directly into each clock driver and remove the header. The only exception here is the dragonboard820c board file which includes some pinctrl macros, those are also inlined. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> [caleb: remove additional sysmap-sdm845.h mention]
41 lines
984 B
C
41 lines
984 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Board configuration file for Dragonboard 410C
|
|
*
|
|
* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
|
|
*/
|
|
|
|
#ifndef __CONFIGS_DRAGONBOARD820C_H
|
|
#define __CONFIGS_DRAGONBOARD820C_H
|
|
|
|
#include <linux/sizes.h>
|
|
|
|
/* Physical Memory Map */
|
|
|
|
#define PHYS_SDRAM_SIZE 0xC0000000
|
|
#define PHYS_SDRAM_1 0x80000000
|
|
#define PHYS_SDRAM_1_SIZE 0x60000000
|
|
#define PHYS_SDRAM_2 0x100000000
|
|
#define PHYS_SDRAM_2_SIZE 0x5ea4ffff
|
|
|
|
#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
|
|
|
#include <config_distro_bootcmd.h>
|
|
|
|
#define BOOT_TARGET_DEVICES(func) \
|
|
func(MMC, mmc, 0)
|
|
|
|
#define CFG_EXTRA_ENV_SETTINGS \
|
|
"loadaddr=0x95000000\0" \
|
|
"fdt_high=0xffffffffffffffff\0" \
|
|
"initrd_high=0xffffffffffffffff\0" \
|
|
"linux_image=uImage\0" \
|
|
"kernel_addr_r=0x95000000\0"\
|
|
"fdtfile=qcom/apq8096-db820c.dtb\0" \
|
|
"fdt_addr_r=0x93000000\0"\
|
|
"ramdisk_addr_r=0x91000000\0"\
|
|
"scriptaddr=0x90000000\0"\
|
|
"pxefile_addr_r=0x90100000\0"\
|
|
BOOTENV
|
|
|
|
#endif
|