Nishanth Menon 18c9d55ac6 ARM: OMAP5: DRA7xx: support class 0 optimized voltages ... DRA752 now uses AVS Class 0 voltages which are voltages in efuse. This means that we can now use the optimized voltages which are stored as mV values in efuse and program PMIC accordingly. This allows us to go with higher OPP as needed in the system without the need for implementing complex AVS logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2013-06-10 08:43:10 -04:00
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clock.h	ARM: OMAP5: DRA7xx: support class 0 optimized voltages	2013-06-10 08:43:10 -04:00
cpu.h	ARM: OMAP4+: Cleanup header files	2013-06-10 08:43:09 -04:00
gpio.h	omap5: Add minimal support for omap5430.	2011-11-15 22:25:50 +01:00
i2c.h	OMAP5: I2C: Set I2C_BUS_MAX to 5 to enable I2C4 and I2C5	2013-05-10 08:25:55 -04:00
mmc_host_def.h	omap: consolidate common mmc definitions	2013-03-08 16:41:12 -05:00
mux_dra7xx.h	arm: dra7xx: Add board files for DRA7XX socs	2013-03-11 11:39:30 -04:00
mux_omap5.h	arm: dra7xx: Add board files for DRA7XX socs	2013-03-11 11:39:30 -04:00
omap.h	ARM: DRA7xx: Add control id code for DRA7xx	2013-06-10 08:43:09 -04:00
spl.h	OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC	2013-04-08 11:29:34 -04:00
sys_proto.h	ARM: DRA7xx: power Add support for tps659038 PMIC	2013-06-10 08:43:09 -04:00