mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
716ece1de9
This patch adds support for the AVR32 LCD controller. This patch is based off the latest u-boot-video. A quick summary of what's going on:- Enable LCDC pixel clock Enable LCDC port pins Add framebuffer pointer to global_data struct Allocate framebuffer To use the new code, update your board config to include something like this:- #define CONFIG_LCD 1 #if defined(CONFIG_LCD) #define CONFIG_CMD_BMP #define CONFIG_ATMEL_LCD 1 #define LCD_BPP LCD_COLOR16 #define CONFIG_BMP_16BPP 1 #define CONFIG_FB_ADDR 0x10600000 #define CONFIG_WHITE_ON_BLACK 1 #define CONFIG_VIDEO_BMP_GZIP 1 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 #define CONFIG_ATMEL_LCD_BGR555 1 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 #define CONFIG_SPLASH_SCREEN 1 #endif The standard U-Boot BMP and Splash-screen features should just work. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk> [agust@denx.de: fixed some style issues] Signed-off-by: Anatolij Gustschin <agust@denx.de>
294 lines
8 KiB
C
294 lines
8 KiB
C
/*
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* Copyright (C) 2006, 2008 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/chip-features.h>
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#include <asm/arch/memory-map.h>
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#include <asm/arch/portmux.h>
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/*
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* Lots of small functions here. We depend on --gc-sections getting
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* rid of the ones we don't need.
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*/
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void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width,
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unsigned long flags, unsigned long drive_strength)
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{
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unsigned long porte_mask = 0;
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if (bus_width > 16)
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portmux_select_peripheral(PORTMUX_PORT_E, 0xffff,
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
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if (addr_width > 23)
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porte_mask |= (((1 << (addr_width - 23)) - 1) & 7) << 16;
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if (flags & PORTMUX_EBI_CS(2))
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porte_mask |= 1 << 25;
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if (flags & PORTMUX_EBI_CS(4))
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porte_mask |= 1 << 21;
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if (flags & PORTMUX_EBI_CS(5))
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porte_mask |= 1 << 22;
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if (flags & (PORTMUX_EBI_CF(0) | PORTMUX_EBI_CF(1)))
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porte_mask |= (1 << 19) | (1 << 20) | (1 << 23);
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portmux_select_peripheral(PORTMUX_PORT_E, porte_mask,
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PORTMUX_FUNC_A, 0);
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if (flags & PORTMUX_EBI_NWAIT)
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portmux_select_peripheral(PORTMUX_PORT_E, 1 << 24,
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PORTMUX_FUNC_A, PORTMUX_PULL_UP);
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}
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#ifdef AT32AP700x_CHIP_HAS_MACB
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void portmux_enable_macb0(unsigned long flags, unsigned long drive_strength)
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{
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unsigned long portc_mask;
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portc_mask = (1 << 3) /* TXD0 */
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| (1 << 4) /* TXD1 */
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| (1 << 7) /* TXEN */
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| (1 << 8) /* TXCK */
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| (1 << 9) /* RXD0 */
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| (1 << 10) /* RXD1 */
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| (1 << 13) /* RXER */
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| (1 << 15) /* RXDV */
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| (1 << 16) /* MDC */
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| (1 << 17); /* MDIO */
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if (flags & PORTMUX_MACB_MII)
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portc_mask |= (1 << 0) /* COL */
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| (1 << 1) /* CRS */
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| (1 << 2) /* TXER */
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| (1 << 5) /* TXD2 */
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| (1 << 6) /* TXD3 */
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| (1 << 11) /* RXD2 */
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| (1 << 12) /* RXD3 */
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| (1 << 14); /* RXCK */
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if (flags & PORTMUX_MACB_SPEED)
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portc_mask |= (1 << 18);/* SPD */
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/* REVISIT: Some pins are probably pure outputs */
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portmux_select_peripheral(PORTMUX_PORT_C, portc_mask,
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
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}
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void portmux_enable_macb1(unsigned long flags, unsigned long drive_strength)
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{
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unsigned long portc_mask = 0;
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unsigned long portd_mask;
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portd_mask = (1 << 13) /* TXD0 */
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| (1 << 14) /* TXD1 */
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| (1 << 11) /* TXEN */
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| (1 << 12) /* TXCK */
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| (1 << 10) /* RXD0 */
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| (1 << 6) /* RXD1 */
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| (1 << 5) /* RXER */
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| (1 << 4) /* RXDV */
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| (1 << 3) /* MDC */
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| (1 << 2); /* MDIO */
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if (flags & PORTMUX_MACB_MII)
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portc_mask = (1 << 19) /* COL */
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| (1 << 23) /* CRS */
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| (1 << 26) /* TXER */
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| (1 << 27) /* TXD2 */
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| (1 << 28) /* TXD3 */
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| (1 << 29) /* RXD2 */
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| (1 << 30) /* RXD3 */
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| (1 << 24); /* RXCK */
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if (flags & PORTMUX_MACB_SPEED)
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portd_mask |= (1 << 15);/* SPD */
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/* REVISIT: Some pins are probably pure outputs */
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portmux_select_peripheral(PORTMUX_PORT_D, portc_mask,
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER);
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portmux_select_peripheral(PORTMUX_PORT_C, portc_mask,
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER);
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}
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#endif
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#ifdef AT32AP700x_CHIP_HAS_MMCI
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void portmux_enable_mmci(unsigned int slot, unsigned long flags,
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unsigned long drive_strength)
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{
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unsigned long mask;
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unsigned long portmux_flags = PORTMUX_PULL_UP;
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/* First, the common CLK signal. It doesn't need a pull-up */
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portmux_select_peripheral(PORTMUX_PORT_A, 1 << 10,
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PORTMUX_FUNC_A, 0);
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if (flags & PORTMUX_MMCI_EXT_PULLUP)
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portmux_flags = 0;
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/* Then, the per-slot signals */
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switch (slot) {
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case 0:
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mask = (1 << 11) | (1 << 12); /* CMD and DATA0 */
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if (flags & PORTMUX_MMCI_4BIT)
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/* DATA1..DATA3 */
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mask |= (1 << 13) | (1 << 14) | (1 << 15);
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portmux_select_peripheral(PORTMUX_PORT_A, mask,
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PORTMUX_FUNC_A, portmux_flags);
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break;
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case 1:
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mask = (1 << 6) | (1 << 7); /* CMD and DATA0 */
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if (flags & PORTMUX_MMCI_4BIT)
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/* DATA1..DATA3 */
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mask |= (1 << 8) | (1 << 9) | (1 << 10);
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portmux_select_peripheral(PORTMUX_PORT_B, mask,
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PORTMUX_FUNC_B, portmux_flags);
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break;
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}
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}
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#endif
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#ifdef AT32AP700x_CHIP_HAS_SPI
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void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength)
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{
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unsigned long pin_mask;
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/* MOSI and SCK */
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portmux_select_peripheral(PORTMUX_PORT_A, (1 << 1) | (1 << 2),
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PORTMUX_FUNC_A, 0);
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/* MISO may float */
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portmux_select_peripheral(PORTMUX_PORT_A, 1 << 0,
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
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/* Set up NPCSx as GPIO outputs, initially high */
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pin_mask = (cs_mask & 7) << 3;
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if (cs_mask & (1 << 3))
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pin_mask |= 1 << 20;
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portmux_select_gpio(PORTMUX_PORT_A, pin_mask,
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PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
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}
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void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength)
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{
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/* MOSI and SCK */
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portmux_select_peripheral(PORTMUX_PORT_B, (1 << 1) | (1 << 5),
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PORTMUX_FUNC_B, 0);
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/* MISO may float */
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portmux_select_peripheral(PORTMUX_PORT_B, 1 << 0,
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER);
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/* Set up NPCSx as GPIO outputs, initially high */
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portmux_select_gpio(PORTMUX_PORT_B, (cs_mask & 7) << 2,
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PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
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portmux_select_gpio(PORTMUX_PORT_A, (cs_mask & 8) << (27 - 3),
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PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
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}
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#endif
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#ifdef AT32AP700x_CHIP_HAS_LCDC
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void portmux_enable_lcdc(int pin_config)
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{
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unsigned long portc_mask = 0;
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unsigned long portd_mask = 0;
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unsigned long porte_mask = 0;
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switch (pin_config) {
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case 0:
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portc_mask = (1 << 19) /* CC */
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| (1 << 20) /* HSYNC */
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| (1 << 21) /* PCLK */
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| (1 << 22) /* VSYNC */
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| (1 << 23) /* DVAL */
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| (1 << 24) /* MODE */
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| (1 << 25) /* PWR */
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| (1 << 26) /* DATA0 */
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| (1 << 27) /* DATA1 */
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| (1 << 28) /* DATA2 */
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| (1 << 29) /* DATA3 */
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| (1 << 30) /* DATA4 */
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| (1 << 31); /* DATA5 */
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portd_mask = (1 << 0) /* DATA6 */
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| (1 << 1) /* DATA7 */
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| (1 << 2) /* DATA8 */
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| (1 << 3) /* DATA9 */
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| (1 << 4) /* DATA10 */
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| (1 << 5) /* DATA11 */
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| (1 << 6) /* DATA12 */
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| (1 << 7) /* DATA13 */
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| (1 << 8) /* DATA14 */
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| (1 << 9) /* DATA15 */
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| (1 << 10) /* DATA16 */
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| (1 << 11) /* DATA17 */
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| (1 << 12) /* DATA18 */
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| (1 << 13) /* DATA19 */
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| (1 << 14) /* DATA20 */
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| (1 << 15) /* DATA21 */
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| (1 << 16) /* DATA22 */
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| (1 << 17); /* DATA23 */
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break;
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case 1:
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portc_mask = (1 << 20) /* HSYNC */
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| (1 << 21) /* PCLK */
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| (1 << 22) /* VSYNC */
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| (1 << 25) /* PWR */
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| (1 << 31); /* DATA5 */
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portd_mask = (1 << 0) /* DATA6 */
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| (1 << 1) /* DATA7 */
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| (1 << 7) /* DATA13 */
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| (1 << 8) /* DATA14 */
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| (1 << 9) /* DATA15 */
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| (1 << 16) /* DATA22 */
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| (1 << 17); /* DATA23 */
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porte_mask = (1 << 0) /* CC */
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| (1 << 1) /* DVAL */
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| (1 << 2) /* MODE */
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| (1 << 3) /* DATA0 */
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| (1 << 4) /* DATA1 */
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| (1 << 5) /* DATA2 */
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| (1 << 6) /* DATA3 */
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| (1 << 7) /* DATA4 */
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| (1 << 8) /* DATA8 */
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| (1 << 9) /* DATA9 */
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| (1 << 10) /* DATA10 */
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| (1 << 11) /* DATA11 */
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| (1 << 12) /* DATA12 */
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| (1 << 13) /* DATA16 */
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| (1 << 14) /* DATA17 */
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| (1 << 15) /* DATA18 */
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| (1 << 16) /* DATA19 */
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| (1 << 17) /* DATA20 */
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| (1 << 18); /* DATA21 */
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break;
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}
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/* REVISIT: Some pins are probably pure outputs */
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portmux_select_peripheral(PORTMUX_PORT_C, portc_mask,
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
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portmux_select_peripheral(PORTMUX_PORT_D, portd_mask,
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PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
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portmux_select_peripheral(PORTMUX_PORT_E, porte_mask,
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PORTMUX_FUNC_B, PORTMUX_BUSKEEPER);
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}
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#endif
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