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6995a28937
This patch updates secure_emif_sdram_config with the same value written to sdram_config during ddr3 initialization. During suspend/resume, this value is copied into sdram_config. With this, a write to sdram_config at the end of resume sequence which triggers an init sequence can be avoided. Without this register write in place, the DDR_RESET line goes low for a few cycles during resume which is a violation of the JEDEC spec. Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> |
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.. | ||
clock.h | ||
clocks_am33xx.h | ||
cpu.h | ||
ddr_defs.h | ||
gpio.h | ||
hardware.h | ||
i2c.h | ||
mmc_host_def.h | ||
omap.h | ||
sys_proto.h |