mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
786d9f1a82
QorIQ U-Boot binary for SD card booting compiled during build process (either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot BootROM requires that image on SD card must contain special boot sector. Implement support for generating this special boot sector directly in U-Boot start code. Boot sector needs to be at the beginning of the image, so when compiling only proper U-Boot without SPL then it needs to be in proper U-Boot. When compiling SPL with proper U-Boot then it needs to be only in SPL. Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR. Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot image could be stored on the SD card. Signed-off-by: Pali Rohár <pali@kernel.org>
121 lines
2.5 KiB
Text
121 lines
2.5 KiB
Text
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
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*/
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#include "config.h"
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#ifdef CONFIG_RESET_VECTOR_ADDRESS
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#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
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#else
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#define RESET_VECTOR_ADDRESS 0xfffffffc
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#endif
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OUTPUT_ARCH(powerpc)
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ENTRY(_start)
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SECTIONS
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{
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/* Optional boot sector */
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#if defined(CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR) && !defined(CONFIG_SPL)
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.bootsect CONFIG_SYS_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
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KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootsect))
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. = CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512;
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}
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#endif
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/* Read-only sections, merged into text segment: */
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.text :
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{
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#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
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KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
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#endif
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*(.text*)
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}
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_etext = .;
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PROVIDE (etext = .);
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.rodata :
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{
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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}
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/* Read-write section, merged into data segment: */
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. = (. + 0x00FF) & 0xFFFFFF00;
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_erotext = .;
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PROVIDE (erotext = .);
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.reloc :
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{
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_GOT2_TABLE_ = .;
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KEEP(*(.got2))
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KEEP(*(.got))
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_FIXUP_TABLE_ = .;
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KEEP(*(.fixup))
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}
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__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
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__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
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.data :
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{
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*(.data*)
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*(.sdata*)
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}
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_edata = .;
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PROVIDE (edata = .);
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. = .;
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. = ALIGN(4);
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__u_boot_list : {
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KEEP(*(SORT(__u_boot_list*)));
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}
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. = .;
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__start___ex_table = .;
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__ex_table : { *(__ex_table) }
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__stop___ex_table = .;
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. = ALIGN(4);
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__init_begin = .;
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.text.init : { *(.text.init) }
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.data.init : { *(.data.init) }
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. = ALIGN(4);
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__init_end = .;
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_end = .;
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#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
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.bootpg RESET_VECTOR_ADDRESS - 0xffc :
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{
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arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
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} = 0xffff
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.resetvec RESET_VECTOR_ADDRESS :
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{
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KEEP(*(.resetvec))
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} = 0xffff
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. = RESET_VECTOR_ADDRESS + 0x4;
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/*
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* Make sure that the bss segment isn't linked at 0x0, otherwise its
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* address won't be updated during relocation fixups. Note that
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* this is a temporary fix. Code to dynamically the fixup the bss
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* location will be added in the future. When the bss relocation
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* fixup code is present this workaround should be removed.
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*/
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#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
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. |= 0x10;
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#endif
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#endif
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__bss_start = .;
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.bss (NOLOAD) :
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{
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*(.sbss*)
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*(.bss*)
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*(COMMON)
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}
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. = ALIGN(4);
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__bss_end = . ;
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PROVIDE (end = .);
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}
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