mirror of
https://github.com/AsahiLinux/u-boot
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101 lines
2.6 KiB
C
101 lines
2.6 KiB
C
/*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/processor.h>
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#include <asm/immap.h>
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#ifdef CONFIG_M5272
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int interrupt_init(void)
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{
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volatile intctrl_t *intp = (intctrl_t *) (MMAP_INTC);
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/* disable all external interrupts */
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intp->int_icr1 = 0x88888888;
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intp->int_icr2 = 0x88888888;
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intp->int_icr3 = 0x88888888;
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intp->int_icr4 = 0x88888888;
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intp->int_pitr = 0x00000000;
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/* initialize vector register */
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intp->int_pivr = 0x40;
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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volatile intctrl_t *intp = (intctrl_t *) (CFG_INTR_BASE);
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intp->int_icr1 &= ~INT_ICR1_TMR3MASK;
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intp->int_icr1 |= CFG_TMRINTR_PRI;
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}
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#endif /* CONFIG_MCFTMR */
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#endif /* CONFIG_M5272 */
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#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
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int interrupt_init(void)
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{
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volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
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/* Make sure all interrupts are disabled */
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intp->imrl0 |= 0x1;
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
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intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
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intp->imrl0 &= 0xFFFFFFFE;
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intp->imrl0 &= ~CFG_TMRINTR_MASK;
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}
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#endif /* CONFIG_MCFTMR */
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#endif /* CONFIG_M5282 | CONFIG_M5271 */
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#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
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int interrupt_init(void)
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{
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enable_interrupts();
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return 0;
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}
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#if defined(CONFIG_MCFTMR)
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void dtimer_intr_setup(void)
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{
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mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
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mbar_writeByte(MCFSIM_TIMER2ICR, CFG_TMRINTR_PRI);
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}
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#endif /* CONFIG_MCFTMR */
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#endif /* CONFIG_M5249 || CONFIG_M5253 */
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