mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 05:42:58 +00:00
a811db5a8c
Commit 41623c91
moved exception handlers to ".vectores" section
but it missed to adjust Zynq linker script.
Zynq boards hang up after relocation because "_start" symbol
does not point to the correct address and gd->relocaddr gets insane.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Michal Simek <monstr@monstr.eu>
Tested-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
105 lines
1.7 KiB
Text
105 lines
1.7 KiB
Text
/*
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* Copyright (c) 2004-2008 Texas Instruments
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x00000000;
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. = ALIGN(4);
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.text :
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{
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*(.__image_copy_start)
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*(.vectors)
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CPUDIR/start.o (.text*)
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*(.text*)
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}
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : {
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*(.data*)
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}
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. = ALIGN(4);
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. = .;
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. = ALIGN(4);
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.u_boot_list : {
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KEEP(*(SORT(.u_boot_list*)));
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}
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. = ALIGN(4);
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.image_copy_end :
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{
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*(.__image_copy_end)
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}
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.rel_dyn_start :
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{
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*(.__rel_dyn_start)
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}
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.rel.dyn : {
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*(.rel*)
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}
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.rel_dyn_end :
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{
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*(.__rel_dyn_end)
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}
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.end :
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{
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*(.__end)
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}
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_image_binary_end = .;
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/*
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* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
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* __bss_base and __bss_limit are for linker only (overlay ordering)
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*/
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.bss_start __rel_dyn_start (OVERLAY) : {
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KEEP(*(.__bss_start));
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__bss_base = .;
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}
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.bss __bss_base (OVERLAY) : {
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*(.bss*)
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. = ALIGN(4);
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__bss_limit = .;
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}
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.bss_end __bss_limit (OVERLAY) : {
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KEEP(*(.__bss_end));
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}
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/*
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* Zynq needs to discard these sections because the user
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* is expected to pass this image on to tools for boot.bin
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* generation that require them to be dropped.
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*/
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/DISCARD/ : { *(.dynsym) }
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/DISCARD/ : { *(.dynbss*) }
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/DISCARD/ : { *(.dynstr*) }
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/DISCARD/ : { *(.dynamic*) }
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/DISCARD/ : { *(.plt*) }
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/DISCARD/ : { *(.interp*) }
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/DISCARD/ : { *(.gnu*) }
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/DISCARD/ : { *(.ARM.exidx*) }
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/DISCARD/ : { *(.gnu.linkonce.armexidx.*) }
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}
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