mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-24 20:13:39 +00:00
ee562dc34e
The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Brought in the correct Tegra210 CAR binding; the old file in U-Boot appears to be a renamed version of the Tegra124 bindings rather than the real Tegra210 version. * Conversion of SPI and UART nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot, including separation of the Tegra LIC (Legacy IRQ controller) and GIC. * Node sort order fixes. Remaining deltas relative to the Linux DT: * U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet. * The GPIO node compatible value in the kernel explicitly includes Tegra124 values whereas U-Boot does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
36 lines
1 KiB
C
36 lines
1 KiB
C
#ifndef DT_BINDINGS_MEMORY_TEGRA210_MC_H
|
|
#define DT_BINDINGS_MEMORY_TEGRA210_MC_H
|
|
|
|
#define TEGRA_SWGROUP_PTC 0
|
|
#define TEGRA_SWGROUP_DC 1
|
|
#define TEGRA_SWGROUP_DCB 2
|
|
#define TEGRA_SWGROUP_AFI 3
|
|
#define TEGRA_SWGROUP_AVPC 4
|
|
#define TEGRA_SWGROUP_HDA 5
|
|
#define TEGRA_SWGROUP_HC 6
|
|
#define TEGRA_SWGROUP_NVENC 7
|
|
#define TEGRA_SWGROUP_PPCS 8
|
|
#define TEGRA_SWGROUP_SATA 9
|
|
#define TEGRA_SWGROUP_MPCORE 10
|
|
#define TEGRA_SWGROUP_ISP2 11
|
|
#define TEGRA_SWGROUP_XUSB_HOST 12
|
|
#define TEGRA_SWGROUP_XUSB_DEV 13
|
|
#define TEGRA_SWGROUP_ISP2B 14
|
|
#define TEGRA_SWGROUP_TSEC 15
|
|
#define TEGRA_SWGROUP_A9AVP 16
|
|
#define TEGRA_SWGROUP_GPU 17
|
|
#define TEGRA_SWGROUP_SDMMC1A 18
|
|
#define TEGRA_SWGROUP_SDMMC2A 19
|
|
#define TEGRA_SWGROUP_SDMMC3A 20
|
|
#define TEGRA_SWGROUP_SDMMC4A 21
|
|
#define TEGRA_SWGROUP_VIC 22
|
|
#define TEGRA_SWGROUP_VI 23
|
|
#define TEGRA_SWGROUP_NVDEC 24
|
|
#define TEGRA_SWGROUP_APE 25
|
|
#define TEGRA_SWGROUP_NVJPG 26
|
|
#define TEGRA_SWGROUP_SE 27
|
|
#define TEGRA_SWGROUP_AXIAP 28
|
|
#define TEGRA_SWGROUP_ETR 29
|
|
#define TEGRA_SWGROUP_TSECB 30
|
|
|
|
#endif
|