mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-29 10:52:09 +00:00
353bdaecee
Despite the official specification, Marvell BootROM does not interpret
srcaddr from SDIO image as offset in number of sectors (like for SATA
image), but as offset in bytes (like for all other images except SATA).
To process SDIO kwbimage and load U-Boot proper from it in the same way as
Marvell BootROM, it is needed to interpret srcaddr in bytes. This change
fixes booting of U-Boot proper from SPL code stored in SDIO image.
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Signed-off-by: Pali Rohár <pali@kernel.org>
357 lines
9.8 KiB
C
357 lines
9.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <hang.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC) || \
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defined(CONFIG_SPL_SATA)
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/*
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* When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
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* point to the offset of kwbimage main header which is always at offset zero
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* (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
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* makes U-Boot non-bootable.
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*/
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#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
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#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
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#error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
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#endif
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#endif
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/*
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* When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
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* kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
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* header and figure out at which sector the U-Boot proper binary is stored.
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* Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
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* and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
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* kwbimage main header.
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*/
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#ifdef CONFIG_SPL_MMC
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#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
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#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
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#endif
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#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
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#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
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#endif
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#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && \
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
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#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
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#endif
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#endif
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/*
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* When loading U-Boot via SPL from SATA disk, the kwbimage main header is
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* stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
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* set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
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*/
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#ifdef CONFIG_SPL_SATA
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#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || \
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!defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
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#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
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#endif
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#endif
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/* Boot Type - block ID */
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#define IBR_HDR_I2C_ID 0x4D
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#define IBR_HDR_SPI_ID 0x5A
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#define IBR_HDR_NAND_ID 0x8B
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#define IBR_HDR_SATA_ID 0x78
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#define IBR_HDR_PEX_ID 0x9C
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#define IBR_HDR_UART_ID 0x69
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#define IBR_HDR_SDIO_ID 0xAE
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/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
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struct kwbimage_main_hdr_v1 {
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u8 blockid; /* 0x0 */
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u8 flags; /* 0x1 */
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u16 nandpagesize; /* 0x2-0x3 */
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u32 blocksize; /* 0x4-0x7 */
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u8 version; /* 0x8 */
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u8 headersz_msb; /* 0x9 */
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u16 headersz_lsb; /* 0xA-0xB */
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u32 srcaddr; /* 0xC-0xF */
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u32 destaddr; /* 0x10-0x13 */
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u32 execaddr; /* 0x14-0x17 */
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u8 options; /* 0x18 */
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u8 nandblocksize; /* 0x19 */
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u8 nandbadblklocation; /* 0x1A */
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u8 reserved4; /* 0x1B */
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u16 reserved5; /* 0x1C-0x1D */
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u8 ext; /* 0x1E */
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u8 checksum; /* 0x1F */
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} __packed;
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#ifdef CONFIG_SPL_MMC
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u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
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{
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return MMCSD_MODE_RAW;
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}
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#endif
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static u32 checksum32(void *start, u32 len)
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{
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u32 csum = 0;
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u32 *p = start;
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while (len > 0) {
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csum += *p++;
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len -= sizeof(u32);
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};
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return csum;
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}
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int spl_check_board_image(struct spl_image_info *spl_image,
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const struct spl_boot_device *bootdev)
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{
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u32 csum = *(u32 *)(spl_image->load_addr + spl_image->size - 4);
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if (checksum32((void *)spl_image->load_addr,
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spl_image->size - 4) != csum) {
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printf("ERROR: Invalid data checksum in kwbimage\n");
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return -EINVAL;
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}
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return 0;
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}
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int spl_parse_board_header(struct spl_image_info *spl_image,
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const struct spl_boot_device *bootdev,
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const void *image_header, size_t size)
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{
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const struct kwbimage_main_hdr_v1 *mhdr = image_header;
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if (size < sizeof(*mhdr)) {
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/* This should be compile time assert */
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printf("FATAL ERROR: Image header size is too small\n");
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hang();
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}
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/*
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* Very basic check for image validity. We cannot check mhdr->checksum
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* as it is calculated also from variable length extended headers
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* (including SPL content) which is not included in U-Boot image_header.
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*/
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if (mhdr->version != 1 ||
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((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr)) {
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printf("ERROR: Invalid kwbimage v1\n");
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return -EINVAL;
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}
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if (IS_ENABLED(CONFIG_SPL_SPI_FLASH_SUPPORT) &&
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bootdev->boot_device == BOOT_DEVICE_SPI &&
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mhdr->blockid != IBR_HDR_SPI_ID) {
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printf("ERROR: Wrong blockid (0x%x) in SPI kwbimage\n",
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mhdr->blockid);
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return -EINVAL;
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}
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if (IS_ENABLED(CONFIG_SPL_SATA) &&
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bootdev->boot_device == BOOT_DEVICE_SATA &&
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mhdr->blockid != IBR_HDR_SATA_ID) {
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printf("ERROR: Wrong blockid (0x%x) in SATA kwbimage\n",
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mhdr->blockid);
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return -EINVAL;
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}
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if (IS_ENABLED(CONFIG_SPL_MMC) &&
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(bootdev->boot_device == BOOT_DEVICE_MMC1 ||
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bootdev->boot_device == BOOT_DEVICE_MMC2 ||
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bootdev->boot_device == BOOT_DEVICE_MMC2_2) &&
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mhdr->blockid != IBR_HDR_SDIO_ID) {
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printf("ERROR: Wrong blockid (0x%x) in SDIO kwbimage\n",
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mhdr->blockid);
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return -EINVAL;
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}
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spl_image->offset = mhdr->srcaddr;
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/*
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* For SATA srcaddr is specified in number of sectors.
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* The main header is must be stored at sector number 1.
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* This expects that sector size is 512 bytes and recalculates
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* data offset to bytes relative to the main header.
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*/
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if (IS_ENABLED(CONFIG_SPL_SATA) && mhdr->blockid == IBR_HDR_SATA_ID) {
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if (spl_image->offset < 1) {
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printf("ERROR: Wrong srcaddr (0x%08x) in SATA kwbimage\n",
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spl_image->offset);
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return -EINVAL;
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}
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spl_image->offset -= 1;
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spl_image->offset *= 512;
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}
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if (spl_image->offset % 4 != 0) {
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printf("ERROR: Wrong srcaddr (0x%08x) in kwbimage\n",
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spl_image->offset);
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return -EINVAL;
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}
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if (mhdr->blocksize <= 4 || mhdr->blocksize % 4 != 0) {
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printf("ERROR: Wrong blocksize (0x%08x) in kwbimage\n",
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mhdr->blocksize);
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return -EINVAL;
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}
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spl_image->size = mhdr->blocksize;
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spl_image->entry_point = mhdr->execaddr;
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spl_image->load_addr = mhdr->destaddr;
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spl_image->os = IH_OS_U_BOOT;
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spl_image->name = "U-Boot";
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return 0;
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}
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u32 spl_boot_device(void)
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{
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u32 boot_device = get_boot_device();
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switch (boot_device) {
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/*
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* Return to the BootROM to continue the Marvell xmodem
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* UART boot protocol. As initiated by the kwboot tool.
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*
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* This can only be done by the BootROM since the beginning
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* of the image is already read and interpreted by the BootROM.
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* SPL has no chance to receive this information. So we
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* need to return to the BootROM to enable this xmodem
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* UART download. Use SPL infrastructure to return to BootROM.
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*/
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case BOOT_DEVICE_UART:
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return BOOT_DEVICE_BOOTROM;
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/*
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* If SPL is compiled with chosen boot_device support
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* then use SPL driver for loading U-Boot proper.
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*/
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#ifdef CONFIG_SPL_MMC
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case BOOT_DEVICE_MMC1:
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return BOOT_DEVICE_MMC1;
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#endif
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#ifdef CONFIG_SPL_SATA
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case BOOT_DEVICE_SATA:
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return BOOT_DEVICE_SATA;
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#endif
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#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
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case BOOT_DEVICE_SPI:
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return BOOT_DEVICE_SPI;
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#endif
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/*
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* If SPL is not compiled with chosen boot_device support
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* then return to the BootROM. BootROM supports loading
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* U-Boot proper from any valid boot_device present in SAR
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* register.
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*/
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default:
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return BOOT_DEVICE_BOOTROM;
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}
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}
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void board_boot_order(u32 *spl_boot_list)
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{
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spl_boot_list[0] = spl_boot_device();
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if (spl_boot_list[0] != BOOT_DEVICE_BOOTROM)
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spl_boot_list[1] = BOOT_DEVICE_BOOTROM;
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}
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#else
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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#endif
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int board_return_to_bootrom(struct spl_image_info *spl_image,
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struct spl_boot_device *bootdev)
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{
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u32 *regs = *(u32 **)(CONFIG_SPL_STACK + 4);
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printf("Returning to BootROM (return address 0x%08x)...\n", regs[13]);
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return_to_bootrom();
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/* NOTREACHED - return_to_bootrom() does not return */
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hang();
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}
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/*
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* SPI0 CS0 Flash is mapped to address range 0xD4000000 - 0xD7FFFFFF by BootROM.
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* Proper U-Boot removes this direct mapping. So it is available only in SPL.
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*/
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#if defined(CONFIG_SPL_ENV_IS_IN_SPI_FLASH) && \
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CONFIG_ENV_SPI_BUS == 0 && CONFIG_ENV_SPI_CS == 0 && \
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CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE <= 64*1024*1024
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void *env_sf_get_env_addr(void)
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{
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return (void *)0xD4000000 + CONFIG_ENV_OFFSET;
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}
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#endif
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void board_init_f(ulong dummy)
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{
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int ret;
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/*
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* Pin muxing needs to be done before UART output, since
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* on A38x the UART pins need some re-muxing for output
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* to work.
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*/
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board_early_init_f();
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/*
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* Use special translation offset for SPL. This needs to be
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* configured *before* spl_init() is called as this function
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* calls dm_init() which calls the bind functions of the
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* device drivers. Here the base address needs to be configured
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* (translated) correctly.
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*/
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gd->translation_offset = 0xd0000000 - 0xf1000000;
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ret = spl_init();
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if (ret) {
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printf("spl_init() failed: %d\n", ret);
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hang();
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}
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preloader_console_init();
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/* Armada 375 does not support SerDes and DDR3 init yet */
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#if !defined(CONFIG_ARMADA_375)
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/* First init the serdes PHY's */
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serdes_phy_config();
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/* Setup DDR */
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ret = ddr3_init();
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if (ret) {
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printf("ddr3_init() failed: %d\n", ret);
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if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
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get_boot_device() != BOOT_DEVICE_UART)
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reset_cpu();
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else
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hang();
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}
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#endif
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/* Initialize Auto Voltage Scaling */
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mv_avs_init();
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/* Update read timing control for PCIe */
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mv_rtc_config();
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}
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