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https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/**
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* io.h - DesignWare USB3 DRD IO Header
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*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
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*
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* Authors: Felipe Balbi <balbi@ti.com>,
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* Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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*
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* Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/io.h) and ported
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* to uboot.
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*
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* commit 2c4cbe6e5a : usb: dwc3: add tracepoints to aid debugging
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*
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*/
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#ifndef __DRIVERS_USB_DWC3_IO_H
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#define __DRIVERS_USB_DWC3_IO_H
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#include <asm/io.h>
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#define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
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static inline u32 dwc3_readl(void __iomem *base, u32 offset)
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{
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unsigned long offs = offset - DWC3_GLOBALS_REGS_START;
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u32 value;
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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value = readl(base + offs);
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return value;
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}
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static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
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{
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unsigned long offs = offset - DWC3_GLOBALS_REGS_START;
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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writel(value, base + offs);
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}
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static inline void dwc3_flush_cache(uintptr_t addr, int length)
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{
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flush_dcache_range(addr, addr + ROUND(length, CACHELINE_SIZE));
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}
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#endif /* __DRIVERS_USB_DWC3_IO_H */
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