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https://github.com/AsahiLinux/u-boot
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7cb22f97ee
environment variable which can set to "100", "133", or "150". The CPU clock will be configured accordingly upon next reboot. Other values are ignored. In case of an invalid or undefined "cpuclk" value, the compile-time default CPU clock speed will be used. * Enable Quad-UART on BMS2003 board (initialize the PCMCIA memory window that is used to access the UART registers by the Linux driver) * Patch by Reinhard Meyer, 20 Dec 2003: Fix clock calculation for the MPC5200 for higher clock frequencies (above 2**32 / 10 = 429.5 MHz).
93 lines
2.3 KiB
C
93 lines
2.3 KiB
C
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc5xxx.h>
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#include <asm/processor.h>
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/* ------------------------------------------------------------------------- */
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/* Bus-to-Core Multipliers */
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static int bus2core[] = {
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3, 2, 2, 2, 4, 4, 5, 9,
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6, 11, 8, 10, 3, 12, 7, 0,
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6, 5, 13, 2, 14, 4, 15, 9,
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0, 11, 8, 10, 16, 12, 7, 0
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};
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/* ------------------------------------------------------------------------- */
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/*
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*
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*/
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int get_clocks (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong val, vco;
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#if !defined(CFG_MPC5XXX_CLKIN)
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#error clock measuring not implemented yet - define CFG_MPC5XXX_CLKIN
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#endif
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val = *(vu_long *)MPC5XXX_CDM_PORCFG;
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if (val & (1 << 6)) {
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vco = CFG_MPC5XXX_CLKIN * 12;
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} else {
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vco = CFG_MPC5XXX_CLKIN * 16;
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}
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if (val & (1 << 5)) {
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gd->bus_clk = vco / 8;
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} else {
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gd->bus_clk = vco / 4;
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}
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gd->cpu_clk = gd->bus_clk * bus2core[val & 0x1f] / 2;
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val = *(vu_long *)MPC5XXX_CDM_CFG;
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if (val & (1 << 8)) {
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gd->ipb_clk = gd->bus_clk / 2;
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} else {
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gd->ipb_clk = gd->bus_clk;
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}
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switch (val & 3) {
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case 0: gd->pci_clk = gd->ipb_clk; break;
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case 1: gd->pci_clk = gd->ipb_clk / 2; break;
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default: gd->pci_clk = gd->bus_clk / 4; break;
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}
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return (0);
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}
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int prt_mpc5xxx_clks (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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printf(" Bus %ld MHz, IPB %ld MHz, PCI %ld MHz\n",
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gd->bus_clk / 1000000, gd->ipb_clk / 1000000,
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gd->pci_clk / 1000000);
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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