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https://github.com/AsahiLinux/u-boot
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51cb23d452
This device tree has been extracted from v4.9 kernel Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
65 lines
2.1 KiB
C
65 lines
2.1 KiB
C
/*
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* This header provides constants for the reset controller
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* based peripheral powerdown requests on the STMicroelectronics
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* STiH407 SoC.
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*/
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#ifndef _DT_BINDINGS_RESET_CONTROLLER_STIH407
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#define _DT_BINDINGS_RESET_CONTROLLER_STIH407
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/* Powerdown requests control 0 */
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#define STIH407_EMISS_POWERDOWN 0
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#define STIH407_NAND_POWERDOWN 1
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/* Synp GMAC PowerDown */
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#define STIH407_ETH1_POWERDOWN 2
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/* Powerdown requests control 1 */
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#define STIH407_USB3_POWERDOWN 3
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#define STIH407_USB2_PORT1_POWERDOWN 4
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#define STIH407_USB2_PORT0_POWERDOWN 5
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#define STIH407_PCIE1_POWERDOWN 6
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#define STIH407_PCIE0_POWERDOWN 7
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#define STIH407_SATA1_POWERDOWN 8
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#define STIH407_SATA0_POWERDOWN 9
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/* Reset defines */
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#define STIH407_ETH1_SOFTRESET 0
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#define STIH407_MMC1_SOFTRESET 1
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#define STIH407_PICOPHY_SOFTRESET 2
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#define STIH407_IRB_SOFTRESET 3
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#define STIH407_PCIE0_SOFTRESET 4
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#define STIH407_PCIE1_SOFTRESET 5
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#define STIH407_SATA0_SOFTRESET 6
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#define STIH407_SATA1_SOFTRESET 7
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#define STIH407_MIPHY0_SOFTRESET 8
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#define STIH407_MIPHY1_SOFTRESET 9
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#define STIH407_MIPHY2_SOFTRESET 10
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#define STIH407_SATA0_PWR_SOFTRESET 11
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#define STIH407_SATA1_PWR_SOFTRESET 12
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#define STIH407_DELTA_SOFTRESET 13
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#define STIH407_BLITTER_SOFTRESET 14
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#define STIH407_HDTVOUT_SOFTRESET 15
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#define STIH407_HDQVDP_SOFTRESET 16
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#define STIH407_VDP_AUX_SOFTRESET 17
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#define STIH407_COMPO_SOFTRESET 18
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#define STIH407_HDMI_TX_PHY_SOFTRESET 19
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#define STIH407_JPEG_DEC_SOFTRESET 20
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#define STIH407_VP8_DEC_SOFTRESET 21
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#define STIH407_GPU_SOFTRESET 22
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#define STIH407_HVA_SOFTRESET 23
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#define STIH407_ERAM_HVA_SOFTRESET 24
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#define STIH407_LPM_SOFTRESET 25
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#define STIH407_KEYSCAN_SOFTRESET 26
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#define STIH407_USB2_PORT0_SOFTRESET 27
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#define STIH407_USB2_PORT1_SOFTRESET 28
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#define STIH407_ST231_AUD_SOFTRESET 29
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#define STIH407_ST231_DMU_SOFTRESET 30
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#define STIH407_ST231_GP0_SOFTRESET 31
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#define STIH407_ST231_GP1_SOFTRESET 32
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/* Picophy reset defines */
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#define STIH407_PICOPHY0_RESET 0
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#define STIH407_PICOPHY1_RESET 1
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#define STIH407_PICOPHY2_RESET 2
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH407 */
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