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u-boot/arch/arm/include/asm/arch-aspeed
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Chia-Wei, Wang 337d95c4aa wdt: aspeed: Add AST2600 watchdog support 
AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.

A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:05 -05:00
..
pinctrl.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
platform.h include/configs: aspeed: Remove hardcoded variables 2020-08-14 09:46:40 -04:00
scu_ast2500.h clk: aspeed: Add support for SD clock 2019-09-05 15:27:31 +08:00
scu_ast2600.h clk: aspeed: Add AST2600 clock support 2021-01-18 15:14:56 -05:00
sdram_ast2500.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
sdram_ast2600.h ram: aspeed: Add AST2600 DRAM control support 2021-01-18 15:19:15 -05:00
timer.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wdt.h watchdog: aspeed: restore default value of reset_mask 2018-10-22 09:18:49 -04:00
wdt_ast2600.h wdt: aspeed: Add AST2600 watchdog support 2021-01-18 15:23:05 -05:00